qemu-e2k/target-arm
Peter Maydell 3f1beaca88 target-arm: Implement 'int' loglevel
The 'int' loglevel for recording interrupts and exceptions
requires support in the target-specific code. Implement
it for ARM. This improves debug logging in some situations
that were otherwise pretty opaque, such as when we fault
trying to execute at an exception vector address, which
would otherwise cause an infinite loop of taking exceptions
without any indication in the debug log of what was going on.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1375700771-21665-1-git-send-email-peter.maydell@linaro.org
2013-08-20 14:54:28 +01:00
..
arm-semi.c exec: Change cpu_memory_rw_debug() argument to CPUState 2013-07-23 02:41:33 +02:00
cpu-qom.h cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
cpu.c cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState" 2013-07-29 15:29:15 +02:00
cpu.h cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb() 2013-07-23 02:41:32 +02:00
gdbstub.c cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
helper.c target-arm: Implement 'int' loglevel 2013-08-20 14:54:28 +01:00
helper.h
iwmmxt_helper.c
kvm_arm.h
kvm-stub.c
kvm.c memory: add ref/unref calls 2013-07-04 17:42:45 +02:00
machine.c
Makefile.objs cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
neon_helper.c
op_addsub.h
op_helper.c
translate.c cpu: Move singlestep_enabled field from CPU_COMMON to CPUState 2013-07-23 02:41:32 +02:00