Fabian Aggeler 3f3c82a57d target-arm: insert AArch32 cpregs twice into hashtable ... Prepare for cp register banking by inserting every cp register twice, once for secure world and once for non-secure world. Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch> Signed-off-by: Greg Bellows <greg.bellows@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1416242878-876-8-git-send-email-greg.bellows@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2014-12-11 12:07:49 +00:00
..
arm_ldst.h
arm-semi.c	Pass semihosting exit code back to system.	2014-12-11 12:07:48 +00:00
cpu64.c
cpu-qom.h
cpu.c	target-arm: Separate out M profile cpu_exec_interrupt handling	2014-11-04 12:05:23 +00:00
cpu.h	target-arm: add secure state bit to CPREG hash	2014-12-11 12:07:49 +00:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c
helper-a64.h
helper.c	target-arm: insert AArch32 cpregs twice into hashtable	2014-12-11 12:07:49 +00:00
helper.h
internals.h
iwmmxt_helper.c
kvm32.c	target-arm: add secure state bit to CPREG hash	2014-12-11 12:07:49 +00:00
kvm64.c
kvm_arm.h
kvm-consts.h
kvm-stub.c
kvm.c
machine.c
Makefile.objs
neon_helper.c
op_addsub.h
op_helper.c
psci.c
translate-a64.c
translate.c	target-arm: add secure state bit to CPREG hash	2014-12-11 12:07:49 +00:00
translate.h	target-arm: add non-secure Translation Block flag	2014-12-11 12:07:48 +00:00