qemu-e2k/target
Peter Maydell 3f591a2022 target/arm/psci.c: If EL2 implemented, start CPUs in EL2
The PSCI spec states that a CPU_ON call should cause the new
CPU to be started in the highest implemented Non-secure
exception level. We were incorrectly starting it at the
exception level of the caller, which happens to be correct
if EL2 is not implemented. Implement the correct logic
as described in the PSCI 1.0 spec section 6.4:
 * if EL2 exists and SCR_EL3.HCE is set: start in EL2
 * otherwise start in EL1

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Tested-by: Andrew Jones <drjones@redhat.com>
Message-id: 1483977924-14522-17-git-send-email-peter.maydell@linaro.org
2017-01-20 11:15:10 +00:00
..
alpha cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
arm target/arm/psci.c: If EL2 implemented, start CPUs in EL2 2017-01-20 11:15:10 +00:00
cris qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
i386 This is the same as the v3 posted except a re-base and a few extra signoffs 2017-01-16 18:23:02 +00:00
lm32 qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
m68k This is the same as the v3 posted except a re-base and a few extra signoffs 2017-01-16 18:23:02 +00:00
microblaze cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
mips cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
moxie qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
openrisc cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
ppc This is the same as the v3 posted except a re-base and a few extra signoffs 2017-01-16 18:23:02 +00:00
s390x This is the same as the v3 posted except a re-base and a few extra signoffs 2017-01-16 18:23:02 +00:00
sh4 cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
sparc target-sparc: add ST_BLKINIT_ ASIs for UA2005+ CPUs 2017-01-18 22:03:44 +01:00
tilegx qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
tricore qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
unicore32 cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
xtensa cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00