96401bad45
Modelled System Timer in Microsemi's Smartfusion2 Soc. Timer has two 32bit down counters and two interrupts. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
65 lines
2.2 KiB
C
65 lines
2.2 KiB
C
/*
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* Microsemi SmartFusion2 Timer.
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*
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* Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_MSS_TIMER_H
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#define HW_MSS_TIMER_H
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#include "hw/sysbus.h"
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#include "hw/ptimer.h"
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#define TYPE_MSS_TIMER "mss-timer"
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#define MSS_TIMER(obj) OBJECT_CHECK(MSSTimerState, \
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(obj), TYPE_MSS_TIMER)
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/*
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* There are two 32-bit down counting timers.
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* Timers 1 and 2 can be concatenated into a single 64-bit Timer
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* that operates either in Periodic mode or in One-shot mode.
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* Writing 1 to the TIM64_MODE register bit 0 sets the Timers in 64-bit mode.
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* In 64-bit mode, writing to the 32-bit registers has no effect.
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* Similarly, in 32-bit mode, writing to the 64-bit mode registers
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* has no effect. Only two 32-bit timers are supported currently.
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*/
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#define NUM_TIMERS 2
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#define R_TIM1_MAX 6
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struct Msf2Timer {
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QEMUBH *bh;
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ptimer_state *ptimer;
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uint32_t regs[R_TIM1_MAX];
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qemu_irq irq;
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};
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typedef struct MSSTimerState {
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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uint32_t freq_hz;
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struct Msf2Timer timers[NUM_TIMERS];
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} MSSTimerState;
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#endif /* HW_MSS_TIMER_H */
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