1335fe3eb2
The Aspeed SoCs have a different definition of the end of the ring buffer bit. Add a property to specify which set of bits should be used by the NIC. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Jason Wang <jasowang@redhat.com>
65 lines
1.2 KiB
C
65 lines
1.2 KiB
C
/*
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* Faraday FTGMAC100 Gigabit Ethernet
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*
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* Copyright (C) 2016-2017, IBM Corporation.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#ifndef FTGMAC100_H
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#define FTGMAC100_H
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#define TYPE_FTGMAC100 "ftgmac100"
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#define FTGMAC100(obj) OBJECT_CHECK(FTGMAC100State, (obj), TYPE_FTGMAC100)
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#include "hw/sysbus.h"
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#include "net/net.h"
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typedef struct FTGMAC100State {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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NICState *nic;
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NICConf conf;
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qemu_irq irq;
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MemoryRegion iomem;
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uint8_t *frame;
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uint32_t irq_state;
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uint32_t isr;
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uint32_t ier;
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uint32_t rx_enabled;
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uint32_t rx_ring;
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uint32_t rx_descriptor;
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uint32_t tx_ring;
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uint32_t tx_descriptor;
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uint32_t math[2];
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uint32_t rbsr;
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uint32_t itc;
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uint32_t aptcr;
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uint32_t dblac;
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uint32_t revr;
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uint32_t fear1;
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uint32_t tpafcr;
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uint32_t maccr;
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uint32_t phycr;
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uint32_t phydata;
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uint32_t fcr;
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uint32_t phy_status;
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uint32_t phy_control;
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uint32_t phy_advertise;
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uint32_t phy_int;
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uint32_t phy_int_mask;
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bool aspeed;
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uint32_t txdes0_edotr;
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uint32_t rxdes0_edorr;
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} FTGMAC100State;
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#endif
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