Peter Maydell 7210918cad hw/intc/arm_gic: Make per-cpu GICH memory regions 0x200 bytes large ... Reduce the size of the per-cpu GICH memory regions from 0x1000 to 0x200. The registers only cover 0x200 bytes, and the Cortex-A15 wants to map them at a spacing of 0x200 bytes apart. Having the region be too large interferes with mapping them like that, so reduce it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20180821132811.17675-3-peter.maydell@linaro.org		2018-08-24 13:17:31 +01:00
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allwinner-a10-pic.c
apic_common.c
apic.c
arm_gic_common.c
arm_gic_kvm.c
arm_gic.c
arm_gicv2m.c
arm_gicv3_common.c
arm_gicv3_cpuif.c
arm_gicv3_dist.c
arm_gicv3_its_common.c
arm_gicv3_its_kvm.c
arm_gicv3_kvm.c
arm_gicv3_redist.c
arm_gicv3.c
armv7m_nvic.c
aspeed_vic.c
bcm2835_ic.c
bcm2836_control.c
etraxfs_pic.c
exynos4210_combiner.c
exynos4210_gic.c
gic_internal.h
gicv3_internal.h
grlib_irqmp.c
heathrow_pic.c
i8259_common.c
i8259.c
imx_avic.c
imx_gpcv2.c
intc.c
ioapic_common.c
ioapic.c
lm32_pic.c
Makefile.objs
mips_gic.c
nios2_iic.c
omap_intc.c
ompic.c
openpic_kvm.c
openpic.c
pl190.c
puv3_intc.c
realview_gic.c
s390_flic_kvm.c
s390_flic.c
sh_intc.c
slavio_intctl.c
trace-events
vgic_common.h
xics_kvm.c
xics_pnv.c
xics_spapr.c
xics.c
xilinx_intc.c
xlnx-pmu-iomod-intc.c
xlnx-zynqmp-ipi.c