Richard Henderson 41ba37c477 target/microblaze: Tidy raising of exceptions ... Split out gen_raise_exception which does no cpu state sync. Rename t_gen_raise_exception to gen_raise_exception_sync to emphasize that it does a sync. Create gen_raise_hw_excp to simplify code raising EXCP_HW_EXCP. Since there is now only one use of cpu_esr, perform a store instead and remove the TCG variable. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2020-09-01 07:41:38 -07:00
..
cpu-param.h
cpu-qom.h	cpu: Use DeviceClass reset instead of a special CPUClass reset	2020-03-17 19:48:10 -04:00
cpu.c	target/microblaze: Split out MSR from env->sregs	2020-09-01 07:41:38 -07:00
cpu.h	target/microblaze: Fix width of EDR	2020-09-01 07:41:38 -07:00
gdbstub.c	target/microblaze: Split out EDR from env->sregs	2020-09-01 07:41:38 -07:00
helper.c	target/microblaze: Fix width of ESR	2020-09-01 07:41:38 -07:00
helper.h
meson.build	meson: target	2020-08-21 06:30:35 -04:00
microblaze-decode.h
mmu.c	target/microblaze: Fix width of PC and BTARGET	2020-09-01 07:41:38 -07:00
mmu.h
op_helper.c	target/microblaze: Fix width of ESR	2020-09-01 07:41:38 -07:00
translate.c	target/microblaze: Tidy raising of exceptions	2020-09-01 07:41:38 -07:00