Sergey Sorokin 1b4093ea66 target-arm: Fix translation level on early translation faults ... Qemu reports translation fault on 1st level instead of 0th level in case of AArch64 address translation if the translation table walk is disabled or the address is in the gap between the two regions. Signed-off-by: Sergey Sorokin <afarallax@yandex.ru> Message-id: 1457527503-25958-1-git-send-email-afarallax@yandex.ru Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2016-03-16 17:42:18 +00:00
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arch_dump.c	arm: Clean up includes	2016-01-29 15:07:23 +00:00
arm_ldst.h	target-arm: implement SCTLR.B, drop bswap_code	2016-03-04 11:30:19 +00:00
arm-semi.c
cpu64.c	target-arm: Add the pmceid0 and pmceid1 registers	2016-02-18 14:16:17 +00:00
cpu-qom.h	target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF	2016-02-26 15:09:42 +00:00
cpu.c	target-arm: cpu: Move cpu_is_big_endian to header	2016-03-04 11:30:19 +00:00
cpu.h	target-arm: implement BE32 mode in system emulation	2016-03-04 11:30:21 +00:00
crypto_helper.c
gdbstub64.c
gdbstub.c	target-arm: Add write_type argument to cpsr_write()	2016-02-26 15:09:41 +00:00
helper-a64.c	target-arm: Move aarch64_cpu_do_interrupt() to helper.c	2016-01-21 14:15:08 +00:00
helper-a64.h
helper.c	target-arm: Fix translation level on early translation faults	2016-03-16 17:42:18 +00:00
helper.h	target-arm: Implement MRS (banked) and MSR (banked) instructions	2016-03-16 17:05:58 +00:00
internals.h	target-arm: Move bank_number() into internals.h	2016-02-18 14:16:16 +00:00
iwmmxt_helper.c
kvm32.c	target-arm: Add write_type argument to cpsr_write()	2016-02-26 15:09:41 +00:00
kvm64.c	target-arm: Raw CPSR writes should skip checks and bank switching	2016-02-26 15:09:41 +00:00
kvm_arm.h
kvm-consts.h	all: Clean up includes	2016-02-23 12:43:05 +00:00
kvm-stub.c
kvm.c
machine.c	target-arm: Raw CPSR writes should skip checks and bank switching	2016-02-26 15:09:41 +00:00
Makefile.objs
neon_helper.c
op_addsub.h
op_helper.c	target-arm: Implement MRS (banked) and MSR (banked) instructions	2016-03-16 17:05:58 +00:00
psci.c
translate-a64.c	target-arm: introduce tbflag for endianness	2016-03-04 11:30:20 +00:00
translate.c	target-arm: Implement MRS (banked) and MSR (banked) instructions	2016-03-16 17:05:58 +00:00
translate.h	target-arm: introduce disas flag for endianness	2016-03-04 11:30:20 +00:00