43d1ccd2a0
The comment in tcg-runtime-gvec.c about CONFIG_VECTOR16 says that tcg-op-gvec.c has eliminated size 8 vectors, and only passes on multiples of 16. This may have been true of the first few operations, but is not true of all operations. In particular, multiply, shift by scalar, and compare of 8- and 16-bit elements are not expanded inline if host vector operations are not supported. For an x86_64 host that does not support AVX, this means that we will fall back to the helper, which will attempt to use SSE instructions, which will SEGV on an invalid 8-byte aligned memory operation. This patch simply removes the CONFIG_VECTOR16 code and configuration without further simplification. Buglink: https://bugs.launchpad.net/bugs/1863508 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| tcg | ||
| accel.c | ||
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| qtest.c | ||