qemu-e2k/target
Peter Maydell 442c9d682c target/arm: Convert ERET, ERETAA, ERETAB to decodetree
Convert the exception-return insns ERET, ERETA and ERETB to
decodetree. These were the last insns left in the legacy
decoder function disas_uncond_reg_b(), which allows us to
remove it.

The old decoder explicitly decoded the DRPS instruction,
only in order to call unallocated_encoding() on it, exactly
as would have happened if it hadn't decoded it. This is
because this insn always UNDEFs unless the CPU is in
halting-debug state, which we don't emulate. So we list
the pattern in a comment in a64.decode, but don't actively
decode it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230512144106.3608981-21-peter.maydell@linaro.org
2023-05-18 11:35:38 +01:00
..
alpha target/alpha: Use MO_ALIGN where required 2023-05-05 17:05:58 +01:00
arm target/arm: Convert ERET, ERETAA, ERETAB to decodetree 2023-05-18 11:35:38 +01:00
avr target/avr: Finish conversion to tcg_gen_qemu_{ld,st}_* 2023-05-05 17:05:28 +01:00
cris target/cris: Finish conversion to tcg_gen_qemu_{ld,st}_* 2023-05-05 17:05:28 +01:00
hexagon target/Hexagon: Finish conversion to tcg_gen_qemu_{ld, st}_* 2023-05-05 17:05:28 +01:00
hppa target/hppa: Use MO_ALIGN for system UNALIGN() 2023-05-05 17:05:58 +01:00
i386 target/i386: Add EPYC-Genoa model to support Zen 4 processor series 2023-05-08 16:35:30 +02:00
loongarch target/loongarch: Do not include tcg-ldst.h 2023-05-11 09:53:41 +01:00
m68k target/m68k: Fix gen_load_fp for OS_LONG 2023-05-11 09:49:25 +01:00
microblaze target/microblaze: Remove NB_MMU_MODES define 2023-03-13 06:44:37 -07:00
mips target/mips: Use MO_ALIGN instead of 0 2023-05-11 09:53:41 +01:00
nios2 target/nios2: Remove TARGET_ALIGNED_ONLY 2023-05-11 09:53:41 +01:00
openrisc target/openrisc: Setup FPU for detecting tininess before rounding 2023-05-11 15:40:28 +01:00
ppc tcg: ppc64: Fix mask generation for vextractdm 2023-05-05 12:34:22 -03:00
riscv target/riscv: add Ventana's Veyron V1 CPU 2023-05-05 10:49:50 +10:00
rx target/rx: Avoid tcg_const_i32 2023-03-13 06:44:37 -07:00
s390x target/s390x: Fix EXECUTE of relative branches 2023-05-16 09:14:18 +02:00
sh4 target/sh4: Use MO_ALIGN where required 2023-05-11 09:53:41 +01:00
sparc target/sparc: Use cpu_ld*_code_mmu 2023-05-05 17:09:47 +01:00
tricore target/tricore: Use min/max for saturate 2023-03-13 07:03:39 -07:00
xtensa target/xtensa: Finish conversion to tcg_gen_qemu_{ld, st}_* 2023-05-05 17:05:29 +01:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00