4bc4c3135b
GDB single-stepping is now handled generically. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
139 lines
3.8 KiB
C
139 lines
3.8 KiB
C
/*
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* x86 misc helpers
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#include "exec/exec-all.h"
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#include "helper-tcg.h"
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/*
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* NOTE: the translator must set DisasContext.cc_op to CC_OP_EFLAGS
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* after generating a call to a helper that uses this.
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*/
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void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask)
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{
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CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
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CC_OP = CC_OP_EFLAGS;
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env->df = 1 - (2 * ((eflags >> 10) & 1));
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env->eflags = (env->eflags & ~update_mask) |
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(eflags & update_mask) | 0x2;
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}
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void helper_into(CPUX86State *env, int next_eip_addend)
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{
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int eflags;
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eflags = cpu_cc_compute_all(env, CC_OP);
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if (eflags & CC_O) {
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raise_interrupt(env, EXCP04_INTO, 1, 0, next_eip_addend);
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}
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}
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void helper_cpuid(CPUX86State *env)
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{
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uint32_t eax, ebx, ecx, edx;
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cpu_svm_check_intercept_param(env, SVM_EXIT_CPUID, 0, GETPC());
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cpu_x86_cpuid(env, (uint32_t)env->regs[R_EAX], (uint32_t)env->regs[R_ECX],
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&eax, &ebx, &ecx, &edx);
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env->regs[R_EAX] = eax;
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env->regs[R_EBX] = ebx;
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env->regs[R_ECX] = ecx;
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env->regs[R_EDX] = edx;
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}
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void helper_rdtsc(CPUX86State *env)
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{
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uint64_t val;
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if ((env->cr[4] & CR4_TSD_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) {
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raise_exception_ra(env, EXCP0D_GPF, GETPC());
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}
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cpu_svm_check_intercept_param(env, SVM_EXIT_RDTSC, 0, GETPC());
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val = cpu_get_tsc(env) + env->tsc_offset;
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env->regs[R_EAX] = (uint32_t)(val);
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env->regs[R_EDX] = (uint32_t)(val >> 32);
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}
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void helper_rdtscp(CPUX86State *env)
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{
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helper_rdtsc(env);
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env->regs[R_ECX] = (uint32_t)(env->tsc_aux);
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}
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void QEMU_NORETURN helper_rdpmc(CPUX86State *env)
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{
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if (((env->cr[4] & CR4_PCE_MASK) == 0 ) &&
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((env->hflags & HF_CPL_MASK) != 0)) {
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raise_exception_ra(env, EXCP0D_GPF, GETPC());
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}
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cpu_svm_check_intercept_param(env, SVM_EXIT_RDPMC, 0, GETPC());
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/* currently unimplemented */
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qemu_log_mask(LOG_UNIMP, "x86: unimplemented rdpmc\n");
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raise_exception_err(env, EXCP06_ILLOP, 0);
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}
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void QEMU_NORETURN do_pause(CPUX86State *env)
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{
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CPUState *cs = env_cpu(env);
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/* Just let another CPU run. */
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cs->exception_index = EXCP_INTERRUPT;
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cpu_loop_exit(cs);
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}
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void QEMU_NORETURN helper_pause(CPUX86State *env, int next_eip_addend)
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{
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cpu_svm_check_intercept_param(env, SVM_EXIT_PAUSE, 0, GETPC());
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env->eip += next_eip_addend;
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do_pause(env);
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}
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uint64_t helper_rdpkru(CPUX86State *env, uint32_t ecx)
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{
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if ((env->cr[4] & CR4_PKE_MASK) == 0) {
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raise_exception_err_ra(env, EXCP06_ILLOP, 0, GETPC());
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}
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if (ecx != 0) {
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raise_exception_err_ra(env, EXCP0D_GPF, 0, GETPC());
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}
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return env->pkru;
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}
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void helper_wrpkru(CPUX86State *env, uint32_t ecx, uint64_t val)
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{
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CPUState *cs = env_cpu(env);
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if ((env->cr[4] & CR4_PKE_MASK) == 0) {
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raise_exception_err_ra(env, EXCP06_ILLOP, 0, GETPC());
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}
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if (ecx != 0 || (val & 0xFFFFFFFF00000000ull)) {
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raise_exception_err_ra(env, EXCP0D_GPF, 0, GETPC());
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}
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env->pkru = val;
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tlb_flush(cs);
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}
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