508 lines
18 KiB
C
508 lines
18 KiB
C
/*
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* QTest testcase for Microbit board using the Nordic Semiconductor nRF51 SoC.
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*
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* nRF51:
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* Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
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* Product Spec: http://infocenter.nordicsemi.com/pdf/nRF51822_PS_v3.1.pdf
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*
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* Microbit Board: http://microbit.org/
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*
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* Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
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*
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* This code is licensed under the GPL version 2 or later. See
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* the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "exec/hwaddr.h"
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#include "libqos/libqtest.h"
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#include "hw/arm/nrf51.h"
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#include "hw/char/nrf51_uart.h"
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#include "hw/gpio/nrf51_gpio.h"
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#include "hw/nvram/nrf51_nvm.h"
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#include "hw/timer/nrf51_timer.h"
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#include "hw/i2c/microbit_i2c.h"
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static bool uart_wait_for_event(QTestState *qts, uint32_t event_addr)
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{
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time_t now, start = time(NULL);
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while (true) {
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if (qtest_readl(qts, event_addr) == 1) {
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qtest_writel(qts, event_addr, 0x00);
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return true;
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}
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/* Wait at most 10 minutes */
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now = time(NULL);
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if (now - start > 600) {
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break;
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}
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g_usleep(10000);
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}
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return false;
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}
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static void uart_rw_to_rxd(QTestState *qts, int sock_fd, const char *in,
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char *out)
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{
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int i, in_len = strlen(in);
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g_assert_true(write(sock_fd, in, in_len) == in_len);
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for (i = 0; i < in_len; i++) {
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g_assert_true(uart_wait_for_event(qts, NRF51_UART_BASE +
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A_UART_RXDRDY));
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out[i] = qtest_readl(qts, NRF51_UART_BASE + A_UART_RXD);
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}
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out[i] = '\0';
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}
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static void uart_w_to_txd(QTestState *qts, const char *in)
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{
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int i, in_len = strlen(in);
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for (i = 0; i < in_len; i++) {
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qtest_writel(qts, NRF51_UART_BASE + A_UART_TXD, in[i]);
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g_assert_true(uart_wait_for_event(qts, NRF51_UART_BASE +
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A_UART_TXDRDY));
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}
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}
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static void test_nrf51_uart(void)
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{
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int sock_fd;
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char s[10];
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QTestState *qts = qtest_init_with_serial("-M microbit", &sock_fd);
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g_assert_true(write(sock_fd, "c", 1) == 1);
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g_assert_cmphex(qtest_readl(qts, NRF51_UART_BASE + A_UART_RXD), ==, 0x00);
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qtest_writel(qts, NRF51_UART_BASE + A_UART_ENABLE, 0x04);
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qtest_writel(qts, NRF51_UART_BASE + A_UART_STARTRX, 0x01);
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g_assert_true(uart_wait_for_event(qts, NRF51_UART_BASE + A_UART_RXDRDY));
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qtest_writel(qts, NRF51_UART_BASE + A_UART_RXDRDY, 0x00);
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g_assert_cmphex(qtest_readl(qts, NRF51_UART_BASE + A_UART_RXD), ==, 'c');
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qtest_writel(qts, NRF51_UART_BASE + A_UART_INTENSET, 0x04);
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g_assert_cmphex(qtest_readl(qts, NRF51_UART_BASE + A_UART_INTEN), ==, 0x04);
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qtest_writel(qts, NRF51_UART_BASE + A_UART_INTENCLR, 0x04);
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g_assert_cmphex(qtest_readl(qts, NRF51_UART_BASE + A_UART_INTEN), ==, 0x00);
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uart_rw_to_rxd(qts, sock_fd, "hello", s);
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g_assert_true(memcmp(s, "hello", 5) == 0);
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qtest_writel(qts, NRF51_UART_BASE + A_UART_STARTTX, 0x01);
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uart_w_to_txd(qts, "d");
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g_assert_true(read(sock_fd, s, 10) == 1);
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g_assert_cmphex(s[0], ==, 'd');
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qtest_writel(qts, NRF51_UART_BASE + A_UART_SUSPEND, 0x01);
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qtest_writel(qts, NRF51_UART_BASE + A_UART_TXD, 'h');
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qtest_writel(qts, NRF51_UART_BASE + A_UART_STARTTX, 0x01);
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uart_w_to_txd(qts, "world");
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g_assert_true(read(sock_fd, s, 10) == 5);
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g_assert_true(memcmp(s, "world", 5) == 0);
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close(sock_fd);
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qtest_quit(qts);
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}
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/* Read a byte from I2C device at @addr from register @reg */
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static uint32_t i2c_read_byte(QTestState *qts, uint32_t addr, uint32_t reg)
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{
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uint32_t val;
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qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ADDRESS, addr);
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qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STARTTX, 1);
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qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_TXD, reg);
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val = qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_EVENT_TXDSENT);
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g_assert_cmpuint(val, ==, 1);
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qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1);
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qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STARTRX, 1);
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val = qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_EVENT_RXDREADY);
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g_assert_cmpuint(val, ==, 1);
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val = qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_REG_RXD);
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qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1);
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return val;
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}
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static void test_microbit_i2c(void)
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{
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uint32_t val;
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QTestState *qts = qtest_init("-M microbit");
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/* We don't program pins/irqs but at least enable the device */
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qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 5);
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/* MMA8653 magnetometer detection */
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val = i2c_read_byte(qts, 0x3A, 0x0D);
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g_assert_cmpuint(val, ==, 0x5A);
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val = i2c_read_byte(qts, 0x3A, 0x0D);
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g_assert_cmpuint(val, ==, 0x5A);
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/* LSM303 accelerometer detection */
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val = i2c_read_byte(qts, 0x3C, 0x4F);
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g_assert_cmpuint(val, ==, 0x40);
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qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 0);
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qtest_quit(qts);
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}
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#define FLASH_SIZE (256 * NRF51_PAGE_SIZE)
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static void fill_and_erase(QTestState *qts, hwaddr base, hwaddr size,
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uint32_t address_reg)
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{
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hwaddr i;
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/* Erase Page */
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02);
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qtest_writel(qts, NRF51_NVMC_BASE + address_reg, base);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
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/* Check memory */
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for (i = 0; i < size / 4; i++) {
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g_assert_cmpuint(qtest_readl(qts, base + i * 4), ==, 0xFFFFFFFF);
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}
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/* Fill memory */
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x01);
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for (i = 0; i < size / 4; i++) {
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qtest_writel(qts, base + i * 4, i);
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g_assert_cmpuint(qtest_readl(qts, base + i * 4), ==, i);
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}
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
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}
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static void test_nrf51_nvmc(void)
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{
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uint32_t value;
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hwaddr i;
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QTestState *qts = qtest_init("-M microbit");
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/* Test always ready */
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value = qtest_readl(qts, NRF51_NVMC_BASE + NRF51_NVMC_READY);
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g_assert_cmpuint(value & 0x01, ==, 0x01);
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/* Test write-read config register */
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x03);
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g_assert_cmpuint(qtest_readl(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG),
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==, 0x03);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
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g_assert_cmpuint(qtest_readl(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG),
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==, 0x00);
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/* Test PCR0 */
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fill_and_erase(qts, NRF51_FLASH_BASE, NRF51_PAGE_SIZE,
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NRF51_NVMC_ERASEPCR0);
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fill_and_erase(qts, NRF51_FLASH_BASE + NRF51_PAGE_SIZE,
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NRF51_PAGE_SIZE, NRF51_NVMC_ERASEPCR0);
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/* Test PCR1 */
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fill_and_erase(qts, NRF51_FLASH_BASE, NRF51_PAGE_SIZE,
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NRF51_NVMC_ERASEPCR1);
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fill_and_erase(qts, NRF51_FLASH_BASE + NRF51_PAGE_SIZE,
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NRF51_PAGE_SIZE, NRF51_NVMC_ERASEPCR1);
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/* Erase all */
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_ERASEALL, 0x01);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x01);
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for (i = 0; i < FLASH_SIZE / 4; i++) {
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qtest_writel(qts, NRF51_FLASH_BASE + i * 4, i);
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g_assert_cmpuint(qtest_readl(qts, NRF51_FLASH_BASE + i * 4), ==, i);
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}
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_ERASEALL, 0x01);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
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for (i = 0; i < FLASH_SIZE / 4; i++) {
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g_assert_cmpuint(qtest_readl(qts, NRF51_FLASH_BASE + i * 4),
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==, 0xFFFFFFFF);
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}
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/* Erase UICR */
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_ERASEUICR, 0x01);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
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for (i = 0; i < NRF51_UICR_SIZE / 4; i++) {
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g_assert_cmpuint(qtest_readl(qts, NRF51_UICR_BASE + i * 4),
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==, 0xFFFFFFFF);
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}
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x01);
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for (i = 0; i < NRF51_UICR_SIZE / 4; i++) {
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qtest_writel(qts, NRF51_UICR_BASE + i * 4, i);
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g_assert_cmpuint(qtest_readl(qts, NRF51_UICR_BASE + i * 4), ==, i);
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}
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_ERASEUICR, 0x01);
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qtest_writel(qts, NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
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for (i = 0; i < NRF51_UICR_SIZE / 4; i++) {
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g_assert_cmpuint(qtest_readl(qts, NRF51_UICR_BASE + i * 4),
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==, 0xFFFFFFFF);
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}
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qtest_quit(qts);
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}
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static void test_nrf51_gpio(void)
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{
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size_t i;
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uint32_t actual, expected;
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struct {
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hwaddr addr;
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uint32_t expected;
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} const reset_state[] = {
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{NRF51_GPIO_REG_OUT, 0x00000000}, {NRF51_GPIO_REG_OUTSET, 0x00000000},
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{NRF51_GPIO_REG_OUTCLR, 0x00000000}, {NRF51_GPIO_REG_IN, 0x00000000},
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{NRF51_GPIO_REG_DIR, 0x00000000}, {NRF51_GPIO_REG_DIRSET, 0x00000000},
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{NRF51_GPIO_REG_DIRCLR, 0x00000000}
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};
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QTestState *qts = qtest_init("-M microbit");
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/* Check reset state */
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for (i = 0; i < ARRAY_SIZE(reset_state); i++) {
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expected = reset_state[i].expected;
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actual = qtest_readl(qts, NRF51_GPIO_BASE + reset_state[i].addr);
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g_assert_cmpuint(actual, ==, expected);
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}
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for (i = 0; i < NRF51_GPIO_PINS; i++) {
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expected = 0x00000002;
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actual = qtest_readl(qts, NRF51_GPIO_BASE +
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NRF51_GPIO_REG_CNF_START + i * 4);
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g_assert_cmpuint(actual, ==, expected);
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}
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/* Check dir bit consistency between dir and cnf */
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/* Check set via DIRSET */
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expected = 0x80000001;
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
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g_assert_cmpuint(actual, ==, expected);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START)
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& 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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/* Check clear via DIRCLR */
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
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g_assert_cmpuint(actual, ==, 0x00000000);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START)
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& 0x01;
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g_assert_cmpuint(actual, ==, 0x00);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
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g_assert_cmpuint(actual, ==, 0x00);
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/* Check set via DIR */
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expected = 0x80000001;
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
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g_assert_cmpuint(actual, ==, expected);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START)
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& 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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/* Reset DIR */
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000);
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/* Check Input propagates */
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00);
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qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x00);
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qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 1);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, -1);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
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/* Check pull-up working */
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qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x00);
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
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/* Check pull-down working */
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qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 1);
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x00);
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
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qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, -1);
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/* Check Output propagates */
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qtest_irq_intercept_out(qts, "/machine/nrf51");
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011);
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
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g_assert_true(qtest_get_irq(qts, 0));
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01);
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g_assert_false(qtest_get_irq(qts, 0));
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|
|
|
/* Check self-stimulation */
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01);
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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|
|
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01);
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actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x00);
|
|
|
|
/*
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|
* Check short-circuit - generates an guest_error which must be checked
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|
* manually as long as qtest can not scan qemu_log messages
|
|
*/
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|
qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01);
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qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
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qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
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|
|
|
qtest_quit(qts);
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|
}
|
|
|
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static void timer_task(QTestState *qts, hwaddr task)
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|
{
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qtest_writel(qts, NRF51_TIMER_BASE + task, NRF51_TRIGGER_TASK);
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|
}
|
|
|
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static void timer_clear_event(QTestState *qts, hwaddr event)
|
|
{
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|
qtest_writel(qts, NRF51_TIMER_BASE + event, NRF51_EVENT_CLEAR);
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|
}
|
|
|
|
static void timer_set_bitmode(QTestState *qts, uint8_t mode)
|
|
{
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|
qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_BITMODE, mode);
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|
}
|
|
|
|
static void timer_set_prescaler(QTestState *qts, uint8_t prescaler)
|
|
{
|
|
qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_PRESCALER, prescaler);
|
|
}
|
|
|
|
static void timer_set_cc(QTestState *qts, size_t idx, uint32_t value)
|
|
{
|
|
qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_CC0 + idx * 4, value);
|
|
}
|
|
|
|
static void timer_assert_events(QTestState *qts, uint32_t ev0, uint32_t ev1,
|
|
uint32_t ev2, uint32_t ev3)
|
|
{
|
|
g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_0)
|
|
== ev0);
|
|
g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_1)
|
|
== ev1);
|
|
g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_2)
|
|
== ev2);
|
|
g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_3)
|
|
== ev3);
|
|
}
|
|
|
|
static void test_nrf51_timer(void)
|
|
{
|
|
uint32_t steps_to_overflow = 408;
|
|
QTestState *qts = qtest_init("-M microbit");
|
|
|
|
/* Compare Match */
|
|
timer_task(qts, NRF51_TIMER_TASK_STOP);
|
|
timer_task(qts, NRF51_TIMER_TASK_CLEAR);
|
|
|
|
timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_0);
|
|
timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_1);
|
|
timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_2);
|
|
timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_3);
|
|
|
|
timer_set_bitmode(qts, NRF51_TIMER_WIDTH_16); /* 16 MHz Timer */
|
|
timer_set_prescaler(qts, 0);
|
|
/* Swept over in first step */
|
|
timer_set_cc(qts, 0, 2);
|
|
/* Barely miss on first step */
|
|
timer_set_cc(qts, 1, 162);
|
|
/* Spot on on third step */
|
|
timer_set_cc(qts, 2, 480);
|
|
|
|
timer_assert_events(qts, 0, 0, 0, 0);
|
|
|
|
timer_task(qts, NRF51_TIMER_TASK_START);
|
|
qtest_clock_step(qts, 10000);
|
|
timer_assert_events(qts, 1, 0, 0, 0);
|
|
|
|
/* Swept over on first overflow */
|
|
timer_set_cc(qts, 3, 114);
|
|
|
|
qtest_clock_step(qts, 10000);
|
|
timer_assert_events(qts, 1, 1, 0, 0);
|
|
|
|
qtest_clock_step(qts, 10000);
|
|
timer_assert_events(qts, 1, 1, 1, 0);
|
|
|
|
/* Wrap time until internal counter overflows */
|
|
while (steps_to_overflow--) {
|
|
timer_assert_events(qts, 1, 1, 1, 0);
|
|
qtest_clock_step(qts, 10000);
|
|
}
|
|
|
|
timer_assert_events(qts, 1, 1, 1, 1);
|
|
|
|
timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_0);
|
|
timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_1);
|
|
timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_2);
|
|
timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_3);
|
|
timer_assert_events(qts, 0, 0, 0, 0);
|
|
|
|
timer_task(qts, NRF51_TIMER_TASK_STOP);
|
|
|
|
/* Test Proposal: Stop/Shutdown */
|
|
/* Test Proposal: Shortcut Compare -> Clear */
|
|
/* Test Proposal: Shortcut Compare -> Stop */
|
|
/* Test Proposal: Counter Mode */
|
|
|
|
qtest_quit(qts);
|
|
}
|
|
|
|
int main(int argc, char **argv)
|
|
{
|
|
g_test_init(&argc, &argv, NULL);
|
|
|
|
qtest_add_func("/microbit/nrf51/uart", test_nrf51_uart);
|
|
qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio);
|
|
qtest_add_func("/microbit/nrf51/nvmc", test_nrf51_nvmc);
|
|
qtest_add_func("/microbit/nrf51/timer", test_nrf51_timer);
|
|
qtest_add_func("/microbit/microbit/i2c", test_microbit_i2c);
|
|
|
|
return g_test_run();
|
|
}
|