8e8cbed09a
Commitc87759ce87
fixed a regression affecting pc-q35 machines by introducing a new pc-q35-4.0.1 machine version to be used instead of pc-q35-4.0. The only purpose was to revert the default behaviour of not using split irqchip, but the change also introduced the usual hw_compat and pc_compat bits, and wired them for pc-q35 only. This raises questions when it comes to add new compat properties for 4.0* machine versions of any architecture. Where to add them ? In 4.0, 4.0.1 or both ? Error prone. Another possibility would be to teach all other architectures about 4.0.1. This solution isn't satisfying, especially since this is a pc-q35 specific issue. It turns out that the split irqchip default is handled in the machine option function and doesn't involve compat lists at all. Drop all the 4.0.1 compat lists and use the 4.0 ones instead in the 4.0.1 machine option function. Move the compat props that were added to the 4.0.1 sincec87759ce87
to 4.0. Even if only hw_compat_4_0_1 had an impact on other architectures, drop pc_compat_4_0_1 as well for consistency. Fixes:c87759ce87
"q35: Revert to kernel irqchip" Suggested-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <156051774276.244890.8660277280145466396.stgit@bahia.lan> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
342 lines
12 KiB
C
342 lines
12 KiB
C
/* Declarations for use by board files for creating devices. */
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#ifndef HW_BOARDS_H
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#define HW_BOARDS_H
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#include "sysemu/blockdev.h"
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#include "sysemu/accel.h"
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#include "hw/qdev.h"
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#include "qemu/module.h"
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#include "qom/object.h"
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#include "qom/cpu.h"
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/**
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* memory_region_allocate_system_memory - Allocate a board's main memory
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* @mr: the #MemoryRegion to be initialized
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* @owner: the object that tracks the region's reference count
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* @name: name of the memory region
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* @ram_size: size of the region in bytes
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*
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* This function allocates the main memory for a board model, and
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* initializes @mr appropriately. It also arranges for the memory
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* to be migrated (by calling vmstate_register_ram_global()).
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*
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* Memory allocated via this function will be backed with the memory
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* backend the user provided using "-mem-path" or "-numa node,memdev=..."
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* if appropriate; this is typically used to cause host huge pages to be
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* used. This function should therefore be called by a board exactly once,
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* for the primary or largest RAM area it implements.
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*
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* For boards where the major RAM is split into two parts in the memory
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* map, you can deal with this by calling memory_region_allocate_system_memory()
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* once to get a MemoryRegion with enough RAM for both parts, and then
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* creating alias MemoryRegions via memory_region_init_alias() which
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* alias into different parts of the RAM MemoryRegion and can be mapped
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* into the memory map in the appropriate places.
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*
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* Smaller pieces of memory (display RAM, static RAMs, etc) don't need
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* to be backed via the -mem-path memory backend and can simply
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* be created via memory_region_init_ram().
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*/
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void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
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const char *name,
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uint64_t ram_size);
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#define TYPE_MACHINE_SUFFIX "-machine"
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/* Machine class name that needs to be used for class-name-based machine
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* type lookup to work.
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*/
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#define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX)
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#define TYPE_MACHINE "machine"
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#undef MACHINE /* BSD defines it and QEMU does not use it */
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#define MACHINE(obj) \
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OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE)
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#define MACHINE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE)
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#define MACHINE_CLASS(klass) \
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OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
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extern MachineState *current_machine;
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void machine_run_board_init(MachineState *machine);
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bool machine_usb(MachineState *machine);
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bool machine_kernel_irqchip_allowed(MachineState *machine);
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bool machine_kernel_irqchip_required(MachineState *machine);
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bool machine_kernel_irqchip_split(MachineState *machine);
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int machine_kvm_shadow_mem(MachineState *machine);
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int machine_phandle_start(MachineState *machine);
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bool machine_dump_guest_core(MachineState *machine);
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bool machine_mem_merge(MachineState *machine);
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HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
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void machine_set_cpu_numa_node(MachineState *machine,
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const CpuInstanceProperties *props,
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Error **errp);
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void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
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/**
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* CPUArchId:
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* @arch_id - architecture-dependent CPU ID of present or possible CPU
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* @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
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* @type - QOM class name of possible @cpu object
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* @props - CPU object properties, initialized by board
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* #vcpus_count - number of threads provided by @cpu object
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*/
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typedef struct {
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uint64_t arch_id;
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int64_t vcpus_count;
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CpuInstanceProperties props;
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Object *cpu;
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const char *type;
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} CPUArchId;
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/**
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* CPUArchIdList:
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* @len - number of @CPUArchId items in @cpus array
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* @cpus - array of present or possible CPUs for current machine configuration
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*/
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typedef struct {
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int len;
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CPUArchId cpus[0];
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} CPUArchIdList;
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/**
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* MachineClass:
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* @deprecation_reason: If set, the machine is marked as deprecated. The
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* string should provide some clear information about what to use instead.
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* @max_cpus: maximum number of CPUs supported. Default: 1
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* @min_cpus: minimum number of CPUs supported. Default: 1
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* @default_cpus: number of CPUs instantiated if none are specified. Default: 1
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* @get_hotplug_handler: this function is called during bus-less
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* device hotplug. If defined it returns pointer to an instance
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* of HotplugHandler object, which handles hotplug operation
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* for a given @dev. It may return NULL if @dev doesn't require
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* any actions to be performed by hotplug handler.
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* @cpu_index_to_instance_props:
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* used to provide @cpu_index to socket/core/thread number mapping, allowing
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* legacy code to perform maping from cpu_index to topology properties
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* Returns: tuple of socket/core/thread ids given cpu_index belongs to.
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* used to provide @cpu_index to socket number mapping, allowing
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* a machine to group CPU threads belonging to the same socket/package
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* Returns: socket number given cpu_index belongs to.
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* @hw_version:
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* Value of QEMU_VERSION when the machine was added to QEMU.
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* Set only by old machines because they need to keep
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* compatibility on code that exposed QEMU_VERSION to guests in
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* the past (and now use qemu_hw_version()).
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* @possible_cpu_arch_ids:
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* Returns an array of @CPUArchId architecture-dependent CPU IDs
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* which includes CPU IDs for present and possible to hotplug CPUs.
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* Caller is responsible for freeing returned list.
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* @get_default_cpu_node_id:
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* returns default board specific node_id value for CPU slot specified by
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* index @idx in @ms->possible_cpus[]
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* @has_hotpluggable_cpus:
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* If true, board supports CPUs creation with -device/device_add.
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* @default_cpu_type:
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* specifies default CPU_TYPE, which will be used for parsing target
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* specific features and for creating CPUs if CPU name wasn't provided
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* explicitly at CLI
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* @minimum_page_bits:
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* If non-zero, the board promises never to create a CPU with a page size
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* smaller than this, so QEMU can use a more efficient larger page
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* size than the target architecture's minimum. (Attempting to create
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* such a CPU will fail.) Note that changing this is a migration
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* compatibility break for the machine.
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* @ignore_memory_transaction_failures:
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* If this is flag is true then the CPU will ignore memory transaction
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* failures which should cause the CPU to take an exception due to an
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* access to an unassigned physical address; the transaction will instead
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* return zero (for a read) or be ignored (for a write). This should be
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* set only by legacy board models which rely on the old RAZ/WI behaviour
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* for handling devices that QEMU does not yet model. New board models
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* should instead use "unimplemented-device" for all memory ranges where
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* the guest will attempt to probe for a device that QEMU doesn't
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* implement and a stub device is required.
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* @kvm_type:
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* Return the type of KVM corresponding to the kvm-type string option or
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* computed based on other criteria such as the host kernel capabilities.
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*/
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struct MachineClass {
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/*< private >*/
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ObjectClass parent_class;
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/*< public >*/
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const char *family; /* NULL iff @name identifies a standalone machtype */
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char *name;
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const char *alias;
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const char *desc;
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const char *deprecation_reason;
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void (*init)(MachineState *state);
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void (*reset)(void);
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void (*hot_add_cpu)(const int64_t id, Error **errp);
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int (*kvm_type)(MachineState *machine, const char *arg);
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BlockInterfaceType block_default_type;
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int units_per_default_bus;
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int max_cpus;
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int min_cpus;
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int default_cpus;
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unsigned int no_serial:1,
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no_parallel:1,
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no_floppy:1,
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no_cdrom:1,
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no_sdcard:1,
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pci_allow_0_address:1,
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legacy_fw_cfg_order:1;
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int is_default;
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const char *default_machine_opts;
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const char *default_boot_order;
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const char *default_display;
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GPtrArray *compat_props;
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const char *hw_version;
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ram_addr_t default_ram_size;
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const char *default_cpu_type;
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bool default_kernel_irqchip_split;
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bool option_rom_has_mr;
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bool rom_file_has_mr;
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int minimum_page_bits;
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bool has_hotpluggable_cpus;
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bool ignore_memory_transaction_failures;
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int numa_mem_align_shift;
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const char **valid_cpu_types;
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strList *allowed_dynamic_sysbus_devices;
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bool auto_enable_numa_with_memhp;
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void (*numa_auto_assign_ram)(MachineClass *mc, NodeInfo *nodes,
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int nb_nodes, ram_addr_t size);
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bool ignore_boot_device_suffixes;
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bool smbus_no_migration_support;
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bool nvdimm_supported;
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HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
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DeviceState *dev);
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CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine,
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unsigned cpu_index);
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const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
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int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx);
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};
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/**
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* DeviceMemoryState:
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* @base: address in guest physical address space where the memory
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* address space for memory devices starts
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* @mr: address space container for memory devices
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*/
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typedef struct DeviceMemoryState {
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hwaddr base;
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MemoryRegion mr;
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} DeviceMemoryState;
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/**
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* MachineState:
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*/
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struct MachineState {
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/*< private >*/
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Object parent_obj;
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Notifier sysbus_notifier;
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/*< public >*/
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char *accel;
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bool kernel_irqchip_allowed;
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bool kernel_irqchip_required;
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bool kernel_irqchip_split;
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int kvm_shadow_mem;
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char *dtb;
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char *dumpdtb;
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int phandle_start;
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char *dt_compatible;
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bool dump_guest_core;
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bool mem_merge;
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bool usb;
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bool usb_disabled;
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bool igd_gfx_passthru;
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char *firmware;
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bool iommu;
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bool suppress_vmdesc;
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bool enforce_config_section;
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bool enable_graphics;
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char *memory_encryption;
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DeviceMemoryState *device_memory;
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ram_addr_t ram_size;
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ram_addr_t maxram_size;
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uint64_t ram_slots;
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const char *boot_order;
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char *kernel_filename;
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char *kernel_cmdline;
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char *initrd_filename;
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const char *cpu_type;
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AccelState *accelerator;
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CPUArchIdList *possible_cpus;
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struct NVDIMMState *nvdimms_state;
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};
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#define DEFINE_MACHINE(namestr, machine_initfn) \
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static void machine_initfn##_class_init(ObjectClass *oc, void *data) \
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{ \
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MachineClass *mc = MACHINE_CLASS(oc); \
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machine_initfn(mc); \
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} \
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static const TypeInfo machine_initfn##_typeinfo = { \
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.name = MACHINE_TYPE_NAME(namestr), \
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.parent = TYPE_MACHINE, \
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.class_init = machine_initfn##_class_init, \
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}; \
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static void machine_initfn##_register_types(void) \
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{ \
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type_register_static(&machine_initfn##_typeinfo); \
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} \
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type_init(machine_initfn##_register_types)
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extern GlobalProperty hw_compat_4_0[];
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extern const size_t hw_compat_4_0_len;
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extern GlobalProperty hw_compat_3_1[];
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extern const size_t hw_compat_3_1_len;
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extern GlobalProperty hw_compat_3_0[];
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extern const size_t hw_compat_3_0_len;
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extern GlobalProperty hw_compat_2_12[];
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extern const size_t hw_compat_2_12_len;
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extern GlobalProperty hw_compat_2_11[];
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extern const size_t hw_compat_2_11_len;
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extern GlobalProperty hw_compat_2_10[];
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extern const size_t hw_compat_2_10_len;
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extern GlobalProperty hw_compat_2_9[];
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extern const size_t hw_compat_2_9_len;
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extern GlobalProperty hw_compat_2_8[];
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extern const size_t hw_compat_2_8_len;
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extern GlobalProperty hw_compat_2_7[];
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extern const size_t hw_compat_2_7_len;
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extern GlobalProperty hw_compat_2_6[];
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extern const size_t hw_compat_2_6_len;
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extern GlobalProperty hw_compat_2_5[];
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extern const size_t hw_compat_2_5_len;
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extern GlobalProperty hw_compat_2_4[];
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extern const size_t hw_compat_2_4_len;
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extern GlobalProperty hw_compat_2_3[];
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extern const size_t hw_compat_2_3_len;
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extern GlobalProperty hw_compat_2_2[];
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extern const size_t hw_compat_2_2_len;
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extern GlobalProperty hw_compat_2_1[];
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extern const size_t hw_compat_2_1_len;
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#endif
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