f6d4dd8109
The MAAR register is a read/write register included in Release 5 of the architecture that defines the accessibility attributes of physical address regions. In particular, MAAR defines whether an instruction fetch or data load can speculatively access a memory region within the physical address bounds specified by MAAR. As QEMU doesn't do speculative access, hence this patch only provides ability to access the registers. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> |
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| .. | ||
| cpu-qom.h | ||
| cpu.c | ||
| cpu.h | ||
| dsp_helper.c | ||
| gdbstub.c | ||
| helper.c | ||
| helper.h | ||
| kvm_mips.h | ||
| kvm.c | ||
| lmi_helper.c | ||
| machine.c | ||
| Makefile.objs | ||
| mips-defs.h | ||
| mips-semi.c | ||
| msa_helper.c | ||
| op_helper.c | ||
| TODO | ||
| translate_init.c | ||
| translate.c | ||