qemu-e2k/include/hw/arm
Tong Ho db1264df32 hw/arm: xlnx-zcu102: Add Xilinx eFUSE device
Connect the support for ZynqMP eFUSE one-time field-programmable
bit array.

The command argument:
  -drive if=pflash,index=3,...
Can be used to optionally connect the bit array to a
backend storage, such that field-programmed values
in one invocation can be made available to next
invocation.

The backend storage must be a seekable binary file, and
its size must be 768 bytes or larger. A file with all
binary 0's is a 'blank'.

Signed-off-by: Tong Ho <tong.ho@xilinx.com>
Message-id: 20210917052400.1249094-9-tong.ho@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-09-30 13:42:10 +01:00
..
allwinner-a10.h
allwinner-h3.h
armsse-version.h
armsse.h
armv7m.h hw/arm/armv7m: Create input clocks 2021-09-01 11:08:19 +01:00
aspeed_soc.h hw/arm/aspeed: Allow machine to set UART default 2021-09-20 08:50:59 +02:00
aspeed.h hw/arm/aspeed: Allow machine to set UART default 2021-09-20 08:50:59 +02:00
bcm2835_peripherals.h hw/arm: Add basic power management to raspi. 2021-07-02 11:48:36 +01:00
bcm2836.h
boot.h
digic.h
exynos4210.h
fdt.h
fsl-imx6.h
fsl-imx6ul.h
fsl-imx7.h fsl-imx7: Instantiate SAI1/2/3 as unimplemented devices 2021-08-25 10:48:51 +01:00
fsl-imx25.h
fsl-imx31.h
linux-boot-if.h
msf2-soc.h hw/arm/msf2-soc: Wire up refclk 2021-09-01 11:08:20 +01:00
npcm7xx.h
nrf51_soc.h hw/arm/nrf51: Wire up sysclk 2021-09-01 11:08:20 +01:00
nrf51.h
omap.h
primecell.h
pxa.h
raspi_platform.h
sharpsl.h
smmu-common.h
smmuv3.h
soc_dma.h
stm32f100_soc.h hw/arm/stm32f100: Wire up sysclk and refclk 2021-09-01 11:08:19 +01:00
stm32f205_soc.h hw/arm/stm32f205: Wire up sysclk and refclk 2021-09-01 11:08:19 +01:00
stm32f405_soc.h hw/arm/stm32f405: Wire up sysclk and refclk 2021-09-01 11:08:19 +01:00
sysbus-fdt.h
virt.h hw/arm/virt: add ITS support in virt GIC 2021-09-13 21:01:08 +01:00
xlnx-versal.h hw/arm: xlnx-versal-virt: Add Xilinx eFUSE device 2021-09-30 13:42:10 +01:00
xlnx-zynqmp.h hw/arm: xlnx-zcu102: Add Xilinx eFUSE device 2021-09-30 13:42:10 +01:00