qemu-e2k/include/hw/riscv
Anup Patel 954886ea6d hw/riscv: virt: Add optional ACLINT support to virt machine
We extend virt machine to emulate ACLINT devices only when "aclint=on"
parameter is passed along with machine name in QEMU command-line.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 20210831110603.338681-5-anup.patel@wdc.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-09-21 07:56:49 +10:00
..
boot_opensbi.h
boot.h hw/riscv: Use macros for BIOS image names 2021-06-08 09:59:42 +10:00
microchip_pfsoc.h hw/riscv: microchip_pfsoc: Map EMMC/SD mux register 2021-03-22 21:54:40 -04:00
numa.h hw/riscv: Add helpers for RISC-V multi-socket NUMA machines 2020-08-25 09:11:35 -07:00
opentitan.h hw/riscv: opentitan: Add the flash alias 2021-07-15 08:56:00 +10:00
riscv_hart.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
shakti_c.h hw/riscv: Connect Shakti UART to Shakti platform 2021-05-11 20:02:06 +10:00
sifive_cpu.h
sifive_e.h sifive_e: Rename memmap enum constants 2020-09-18 13:49:48 -04:00
sifive_u.h sifive_u: Connect the SiFive PWM device 2021-09-21 07:56:49 +10:00
spike.h riscv: spike: Remove target macro conditionals 2020-12-17 21:56:44 -08:00
virt.h hw/riscv: virt: Add optional ACLINT support to virt machine 2021-09-21 07:56:49 +10:00