66260159a7
Align the parameters of gdb_get_reg_cb and gdb_set_reg_cb with the gdb_read_register and gdb_write_register members of CPUClass to allow to unify the logic to access registers of the core and coprocessors in the future. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-6-777047380591@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-11-alex.bennee@linaro.org>
126 lines
2.9 KiB
C
126 lines
2.9 KiB
C
/*
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* LOONGARCH gdb server stub
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*
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* Copyright (c) 2021 Loongson Technology Corporation Limited
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*
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* SPDX-License-Identifier: LGPL-2.1+
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "internals.h"
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#include "exec/gdbstub.h"
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#include "gdbstub/helpers.h"
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#include "vec.h"
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uint64_t read_fcc(CPULoongArchState *env)
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{
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uint64_t ret = 0;
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for (int i = 0; i < 8; ++i) {
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ret |= (uint64_t)env->cf[i] << (i * 8);
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}
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return ret;
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}
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void write_fcc(CPULoongArchState *env, uint64_t val)
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{
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for (int i = 0; i < 8; ++i) {
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env->cf[i] = (val >> (i * 8)) & 1;
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}
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}
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int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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{
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LoongArchCPU *cpu = LOONGARCH_CPU(cs);
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CPULoongArchState *env = &cpu->env;
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uint64_t val;
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if (0 <= n && n < 32) {
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val = env->gpr[n];
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} else if (n == 32) {
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/* orig_a0 */
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val = 0;
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} else if (n == 33) {
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val = env->pc;
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} else if (n == 34) {
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val = env->CSR_BADV;
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}
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if (0 <= n && n <= 34) {
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if (is_la64(env)) {
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return gdb_get_reg64(mem_buf, val);
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} else {
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return gdb_get_reg32(mem_buf, val);
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}
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}
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return 0;
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}
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int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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LoongArchCPU *cpu = LOONGARCH_CPU(cs);
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CPULoongArchState *env = &cpu->env;
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target_ulong tmp;
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int read_length;
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int length = 0;
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if (is_la64(env)) {
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tmp = ldq_p(mem_buf);
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read_length = 8;
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} else {
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tmp = ldl_p(mem_buf);
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read_length = 4;
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}
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if (0 <= n && n < 32) {
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env->gpr[n] = tmp;
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length = read_length;
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} else if (n == 33) {
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set_pc(env, tmp);
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length = read_length;
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}
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return length;
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}
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static int loongarch_gdb_get_fpu(CPUState *cs, GByteArray *mem_buf, int n)
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{
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LoongArchCPU *cpu = LOONGARCH_CPU(cs);
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CPULoongArchState *env = &cpu->env;
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if (0 <= n && n < 32) {
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return gdb_get_reg64(mem_buf, env->fpr[n].vreg.D(0));
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} else if (32 <= n && n < 40) {
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return gdb_get_reg8(mem_buf, env->cf[n - 32]);
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} else if (n == 40) {
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return gdb_get_reg32(mem_buf, env->fcsr0);
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}
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return 0;
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}
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static int loongarch_gdb_set_fpu(CPUState *cs, uint8_t *mem_buf, int n)
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{
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LoongArchCPU *cpu = LOONGARCH_CPU(cs);
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CPULoongArchState *env = &cpu->env;
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int length = 0;
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if (0 <= n && n < 32) {
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env->fpr[n].vreg.D(0) = ldq_p(mem_buf);
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length = 8;
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} else if (32 <= n && n < 40) {
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env->cf[n - 32] = ldub_p(mem_buf);
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length = 1;
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} else if (n == 40) {
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env->fcsr0 = ldl_p(mem_buf);
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length = 4;
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}
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return length;
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}
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void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs)
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{
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gdb_register_coprocessor(cs, loongarch_gdb_get_fpu, loongarch_gdb_set_fpu,
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gdb_find_static_feature("loongarch-fpu.xml"), 0);
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}
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