46 lines
1.6 KiB
C
46 lines
1.6 KiB
C
/*
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* ARM page table walking.
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*
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* This code is licensed under the GNU GPL v2 or later.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef TARGET_ARM_PTW_H
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#define TARGET_ARM_PTW_H
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#ifndef CONFIG_USER_ONLY
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uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr, bool is_secure,
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ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi);
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uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr, bool is_secure,
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ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi);
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bool regime_is_user(CPUARMState *env, ARMMMUIdx mmu_idx);
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bool regime_translation_disabled(CPUARMState *env, ARMMMUIdx mmu_idx);
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ARMCacheAttrs combine_cacheattrs(CPUARMState *env,
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ARMCacheAttrs s1, ARMCacheAttrs s2);
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bool get_level1_table_address(CPUARMState *env, ARMMMUIdx mmu_idx,
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uint32_t *table, uint32_t address);
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int ap_to_rw_prot(CPUARMState *env, ARMMMUIdx mmu_idx,
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int ap, int domain_prot);
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int simple_ap_to_rw_prot_is_user(int ap, bool is_user);
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static inline int
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simple_ap_to_rw_prot(CPUARMState *env, ARMMMUIdx mmu_idx, int ap)
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{
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return simple_ap_to_rw_prot_is_user(ap, regime_is_user(env, mmu_idx));
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}
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bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
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MMUAccessType access_type, ARMMMUIdx mmu_idx,
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bool s1_is_el0,
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hwaddr *phys_ptr, MemTxAttrs *txattrs, int *prot,
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target_ulong *page_size_ptr,
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ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs)
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__attribute__((nonnull));
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#endif /* !CONFIG_USER_ONLY */
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#endif /* TARGET_ARM_PTW_H */
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