482f7bf86b
This patch adds some optional compatibility hacks (default disabled) to allow Microport UNIX to function under qemu. I've tried to structure it to be easy to add more hacks for other old CGA programs, if anyone ever needs them. Microport UNIX System V/386 v 2.1 (ca 1987) tries to program the CGA registers directly with neither the assistance of BIOS, nor with proper handling of EGA/VGA-only registers. Note that it didn't work on real VGA hardware, either (although in that case, the most obvious problems seemed to be out-of-range hsync and/or vsync signalling, rather than the issues in this patch). Eventually real MDA and/or CGA support might provide an alternative to this patch, although a hybrid approach like this patch might still be useful in marginal cases. Signed-off-by: Matthew Ogilvie <mmogilvi_qemu@miniinfo.net> Signed-off-by: malc <av1474@comtv.ru>
231 lines
6.6 KiB
C
231 lines
6.6 KiB
C
#ifndef HW_PC_H
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#define HW_PC_H
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#include "qemu-common.h"
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#include "memory.h"
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#include "ioport.h"
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#include "isa.h"
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#include "fdc.h"
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#include "net.h"
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#include "memory.h"
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#include "ioapic.h"
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/* PC-style peripherals (also used by other machines). */
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/* serial.c */
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SerialState *serial_init(int base, qemu_irq irq, int baudbase,
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CharDriverState *chr);
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SerialState *serial_mm_init(MemoryRegion *address_space,
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target_phys_addr_t base, int it_shift,
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qemu_irq irq, int baudbase,
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CharDriverState *chr, enum device_endian);
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static inline bool serial_isa_init(ISABus *bus, int index,
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CharDriverState *chr)
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{
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ISADevice *dev;
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dev = isa_try_create(bus, "isa-serial");
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if (!dev) {
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return false;
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}
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qdev_prop_set_uint32(&dev->qdev, "index", index);
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qdev_prop_set_chr(&dev->qdev, "chardev", chr);
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if (qdev_init(&dev->qdev) < 0) {
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return false;
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}
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return true;
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}
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void serial_set_frequency(SerialState *s, uint32_t frequency);
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/* parallel.c */
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static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
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{
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ISADevice *dev;
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dev = isa_try_create(bus, "isa-parallel");
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if (!dev) {
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return false;
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}
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qdev_prop_set_uint32(&dev->qdev, "index", index);
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qdev_prop_set_chr(&dev->qdev, "chardev", chr);
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if (qdev_init(&dev->qdev) < 0) {
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return false;
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}
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return true;
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}
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bool parallel_mm_init(MemoryRegion *address_space,
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target_phys_addr_t base, int it_shift, qemu_irq irq,
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CharDriverState *chr);
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/* i8259.c */
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extern DeviceState *isa_pic;
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qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
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qemu_irq *kvm_i8259_init(ISABus *bus);
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int pic_read_irq(DeviceState *d);
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int pic_get_output(DeviceState *d);
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void pic_info(Monitor *mon);
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void irq_info(Monitor *mon);
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/* Global System Interrupts */
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#define GSI_NUM_PINS IOAPIC_NUM_PINS
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typedef struct GSIState {
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qemu_irq i8259_irq[ISA_NUM_IRQS];
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qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
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} GSIState;
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void gsi_handler(void *opaque, int n, int level);
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/* vmport.c */
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static inline void vmport_init(ISABus *bus)
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{
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isa_create_simple(bus, "vmport");
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}
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void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
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void vmmouse_get_data(uint32_t *data);
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void vmmouse_set_data(const uint32_t *data);
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/* pckbd.c */
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void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
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void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
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MemoryRegion *region, ram_addr_t size,
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target_phys_addr_t mask);
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void i8042_isa_mouse_fake_event(void *opaque);
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void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
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/* pc.c */
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extern int fd_bootchk;
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void pc_register_ferr_irq(qemu_irq irq);
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void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
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void pc_cpus_init(const char *cpu_model);
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void *pc_memory_init(MemoryRegion *system_memory,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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ram_addr_t below_4g_mem_size,
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ram_addr_t above_4g_mem_size,
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MemoryRegion *rom_memory,
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MemoryRegion **ram_memory);
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qemu_irq *pc_allocate_cpu_irq(void);
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DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
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void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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ISADevice **rtc_state,
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ISADevice **floppy,
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bool no_vmport);
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void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
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void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
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const char *boot_device,
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ISADevice *floppy, BusState *ide0, BusState *ide1,
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ISADevice *s);
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void pc_pci_device_init(PCIBus *pci_bus);
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typedef void (*cpu_set_smm_t)(int smm, void *arg);
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void cpu_smm_register(cpu_set_smm_t callback, void *arg);
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/* acpi.c */
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extern int acpi_enabled;
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extern char *acpi_tables;
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extern size_t acpi_tables_len;
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void acpi_bios_init(void);
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int acpi_table_add(const char *table_desc);
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/* acpi_piix.c */
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i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
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qemu_irq sci_irq, qemu_irq smi_irq,
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int kvm_enabled, void *fw_cfg);
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void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
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/* hpet.c */
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extern int no_hpet;
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/* piix_pci.c */
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struct PCII440FXState;
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typedef struct PCII440FXState PCII440FXState;
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PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
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ISABus **isa_bus, qemu_irq *pic,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io,
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ram_addr_t ram_size,
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target_phys_addr_t pci_hole_start,
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target_phys_addr_t pci_hole_size,
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target_phys_addr_t pci_hole64_start,
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target_phys_addr_t pci_hole64_size,
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MemoryRegion *pci_memory,
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MemoryRegion *ram_memory);
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/* piix4.c */
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extern PCIDevice *piix4_dev;
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int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
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/* vga.c */
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enum vga_retrace_method {
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VGA_RETRACE_DUMB,
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VGA_RETRACE_PRECISE
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};
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extern enum vga_retrace_method vga_retrace_method;
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#define VGA_CGA_HACK_PALETTE_BLANKING (1<<0)
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#define VGA_CGA_HACK_FONT_HEIGHT (1<<1)
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extern int vga_cga_hacks;
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static inline DeviceState *isa_vga_init(ISABus *bus)
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{
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ISADevice *dev;
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dev = isa_try_create(bus, "isa-vga");
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if (!dev) {
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fprintf(stderr, "Warning: isa-vga not available\n");
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return NULL;
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}
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qdev_init_nofail(&dev->qdev);
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return &dev->qdev;
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}
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int isa_vga_mm_init(target_phys_addr_t vram_base,
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target_phys_addr_t ctrl_base, int it_shift,
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MemoryRegion *address_space);
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/* ne2000.c */
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static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
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{
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ISADevice *dev;
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qemu_check_nic_model(nd, "ne2k_isa");
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dev = isa_try_create(bus, "ne2k_isa");
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if (!dev) {
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return false;
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}
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qdev_prop_set_uint32(&dev->qdev, "iobase", base);
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qdev_prop_set_uint32(&dev->qdev, "irq", irq);
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qdev_set_nic_properties(&dev->qdev, nd);
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qdev_init_nofail(&dev->qdev);
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return true;
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}
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/* pc_sysfw.c */
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void pc_system_firmware_init(MemoryRegion *rom_memory);
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/* e820 types */
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#define E820_RAM 1
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#define E820_RESERVED 2
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#define E820_ACPI 3
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#define E820_NVS 4
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#define E820_UNUSABLE 5
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int e820_add_entry(uint64_t, uint64_t, uint32_t);
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#endif
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