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Peter Maydell 44423107e7 target/xtensa updates for 5.2: 
- add NMI support;
 - add DFPU option implementation;
 - update FPU tests to support both FPU2000 and DFPU;
 - add example cores with FPU2000 and DFPU.
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Merge remote-tracking branch 'remotes/xtensa/tags/20200821-xtensa' into staging

target/xtensa updates for 5.2:

- add NMI support;
- add DFPU option implementation;
- update FPU tests to support both FPU2000 and DFPU;
- add example cores with FPU2000 and DFPU.

# gpg: Signature made Fri 21 Aug 2020 21:09:37 BST
# gpg:                using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg:                issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>" [full]
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>" [full]
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20200821-xtensa: (24 commits)
  target/xtensa: import DSP3400 core
  target/xtensa: import de233_fpu core
  tests/tcg/xtensa: add DFP0 arithmetic tests
  tests/tcg/xtensa: test double precision load/store
  tests/tcg/xtensa: add fp0 div and sqrt tests
  tests/tcg/xtensa: update test_lsc for DFPU
  tests/tcg/xtensa: update test_fp1 for DFPU
  tests/tcg/xtensa: update test_fp0_conv for DFPU
  tests/tcg/xtensa: expand madd tests
  tests/tcg/xtensa: update test_fp0_arith for DFPU
  tests/tcg/xtensa: fix test execution on ISS
  target/xtensa: implement FPU division and square root
  target/xtensa: add DFPU registers and opcodes
  target/xtensa: add DFPU option
  target/xtensa: don't access BR regfile directly
  target/xtensa: move FSR/FCR register accessors
  target/xtensa: rename FPU2000 translators and helpers
  target/xtensa: support copying registers up to 64 bits wide
  target/xtensa: add geometry to xtensa_get_regfile_by_name
  softfloat: add xtensa specialization for pickNaNMulAdd
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-24 19:55:23 +01:00
..
authz
block block: Add support to warn on backing file change without format 2020-07-14 15:18:59 +02:00
chardev chardev: Reduce "char-mux.h" scope, rename it "chardev-internal.h" 2020-07-13 11:59:47 +04:00
crypto firmware (and crypto) patches 2020-07-09 20:01:43 +01:00
disas target/avr: Register AVR support with the rest of QEMU 2020-07-11 11:02:05 +02:00
exec meson: rename .inc.h files to .h.inc 2020-08-21 06:18:35 -04:00
fpu softfloat: pass float_status pointer to pickNaN 2020-08-21 12:48:14 -07:00
hw target-arm queue: 2020-08-24 12:13:09 +01:00
io io/task: Move 'qom/object.h' header to source 2020-06-10 12:09:37 -04:00
libdecnumber
migration migration/colo: Use ram_block_discard_disable() 2020-07-02 05:54:59 -04:00
monitor hmp: Implement qom-get HMP command 2020-06-01 18:44:27 +01:00
net hw/net: Added plen fix for IPv6 2020-07-21 21:30:39 +08:00
qapi qapi/error: Check format string argument in error_*prepend() 2020-07-24 15:03:09 +02:00
qemu meson: infrastructure for building emulators 2020-08-21 06:30:17 -04:00
qom qom: Document object_get_canonical_path() returns malloced string 2020-07-21 16:23:43 +02:00
scsi
standard-headers Linux headers: update 2020-06-18 12:13:36 +02:00
sysemu accel/xen: Fix xen_enabled() behavior on target-agnostic objects 2020-08-04 10:21:35 +01:00
tcg meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
ui Remove the CONFIG_PRAGMA_DIAGNOSTIC_AVAILABLE switch 2020-07-13 11:40:52 +02:00
user trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
elf.h Update PowerPC AT_HWCAP2 definition 2020-08-12 13:16:27 +10:00
glib-compat.h
qemu-common.h qemu-common: Document qemu_find_file() 2020-07-21 16:13:04 +02:00
qemu-io.h
trace-tcg.h