96401bad45
Modelled System Timer in Microsemi's Smartfusion2 Soc. Timer has two 32bit down counters and two interrupts. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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a9gtimer.h | ||
allwinner-a10-pit.h | ||
arm_mptimer.h | ||
armv7m_systick.h | ||
aspeed_timer.h | ||
cmsdk-apb-timer.h | ||
digic-timer.h | ||
hpet.h | ||
i8254_internal.h | ||
i8254.h | ||
imx_epit.h | ||
imx_gpt.h | ||
m48t59.h | ||
mc146818rtc_regs.h | ||
mc146818rtc.h | ||
mips_gictimer.h | ||
mss-timer.h | ||
stm32f2xx_timer.h | ||
sun4v-rtc.h |