8063396bf3
This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible. $ ./scripts/codeconverter/converter.py -i \ --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200916182519.415636-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
53 lines
1.2 KiB
C
53 lines
1.2 KiB
C
/*
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* ARM PrimeCell PL022 Synchronous Serial Port
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*
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* Copyright (c) 2007 CodeSourcery.
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* Written by Paul Brook
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or
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* (at your option) any later version.
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*/
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/* This is a model of the Arm PrimeCell PL022 synchronous serial port.
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* The PL022 TRM is:
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* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0194h/DDI0194H_ssp_pl022_trm.pdf
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*
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* QEMU interface:
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* + sysbus IRQ: SSPINTR combined interrupt line
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* + sysbus MMIO region 0: MemoryRegion for the device's registers
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*/
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#ifndef HW_SSI_PL022_H
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#define HW_SSI_PL022_H
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#define TYPE_PL022 "pl022"
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OBJECT_DECLARE_SIMPLE_TYPE(PL022State, PL022)
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struct PL022State {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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uint32_t cr0;
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uint32_t cr1;
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uint32_t bitmask;
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uint32_t sr;
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uint32_t cpsr;
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uint32_t is;
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uint32_t im;
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/* The FIFO head points to the next empty entry. */
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int tx_fifo_head;
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int rx_fifo_head;
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int tx_fifo_len;
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int rx_fifo_len;
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uint16_t tx_fifo[8];
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uint16_t rx_fifo[8];
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qemu_irq irq;
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SSIBus *ssi;
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};
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#endif
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