qemu-e2k/hw/arm
Peter Maydell 856ffa6465 target-arm queue:
* Add support for Cortex-M7 CPU
  * exynos4210_gic: Suppress gcc9 format-truncation warnings
  * aspeed: Various minor bug fixes and improvements
  * aspeed: Add support for the tacoma-bmc board
  * Honour HCR_EL32.TID1 and .TID2 trapping requirements
  * Handle trapping to EL2 of AArch32 VMRS instructions
  * Handle AArch32 CP15 trapping via HSTR_EL2
  * Add support for missing Jazelle system registers
  * arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on
  * Add support for DC CVAP & DC CVADP instructions
  * Fix assertion when SCR.NS is changed in Secure-SVC &c
  * enable SHPC native hot plug in arm ACPI
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191216-1' into staging

target-arm queue:
 * Add support for Cortex-M7 CPU
 * exynos4210_gic: Suppress gcc9 format-truncation warnings
 * aspeed: Various minor bug fixes and improvements
 * aspeed: Add support for the tacoma-bmc board
 * Honour HCR_EL32.TID1 and .TID2 trapping requirements
 * Handle trapping to EL2 of AArch32 VMRS instructions
 * Handle AArch32 CP15 trapping via HSTR_EL2
 * Add support for missing Jazelle system registers
 * arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on
 * Add support for DC CVAP & DC CVADP instructions
 * Fix assertion when SCR.NS is changed in Secure-SVC &c
 * enable SHPC native hot plug in arm ACPI

# gpg: Signature made Mon 16 Dec 2019 11:08:07 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20191216-1: (34 commits)
  target/arm: ensure we use current exception state after SCR update
  hw/arm/virt: Simplify by moving the gic in the machine state
  hw/arm/acpi: enable SHPC native hot plug
  hw/arm/acpi: simplify AML bit and/or statement
  hw/arm/sbsa-ref: Simplify by moving the gic in the machine state
  target/arm: Add support for DC CVAP & DC CVADP ins
  migration: ram: Switch to ram block writeback
  Memory: Enable writeback for given memory region
  tcg: cputlb: Add probe_read
  arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on()
  target/arm: Add support for missing Jazelle system registers
  target/arm: Handle AArch32 CP15 trapping via HSTR_EL2
  target/arm: Handle trapping to EL2 of AArch32 VMRS instructions
  target/arm: Honor HCR_EL2.TID1 trapping requirements
  target/arm: Honor HCR_EL2.TID2 trapping requirements
  aspeed: Change the "nic" property definition
  aspeed: Change the "scu" property definition
  gpio: fix memory leak in aspeed_gpio_init()
  aspeed: Add support for the tacoma-bmc board
  aspeed: Remove AspeedBoardConfig array and use AspeedMachineClass
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-12-16 13:04:34 +00:00
..
allwinner-a10.c
armsse.c
armv7m.c
aspeed_ast2600.c
aspeed_soc.c
aspeed.c
bcm2835_peripherals.c
bcm2836.c
boot.c
collie.c
cubieboard.c
digic_boards.c
digic.c
exynos4_boards.c
exynos4210.c
fsl-imx6.c
fsl-imx6ul.c
fsl-imx7.c
fsl-imx25.c
fsl-imx31.c
gumstix.c
highbank.c
imx25_pdk.c
integratorcp.c
Kconfig
kzm.c
mainstone.c
Makefile.objs
mcimx6ul-evk.c
mcimx7d-sabre.c
microbit.c
mps2-tz.c
mps2.c
msf2-soc.c
msf2-som.c
musca.c
musicpal.c
netduino2.c
nrf51_soc.c
nseries.c
omap1.c
omap2.c
omap_sx1.c
palm.c
pxa2xx_gpio.c
pxa2xx_pic.c
pxa2xx.c
raspi.c
realview.c
sabrelite.c
sbsa-ref.c
smmu-common.c
smmu-internal.h
smmuv3-internal.h
smmuv3.c
spitz.c
stellaris.c
stm32f205_soc.c
strongarm.c
strongarm.h
sysbus-fdt.c
tosa.c
trace-events
versatilepb.c
vexpress.c
virt-acpi-build.c
virt.c target-arm queue: 2019-12-16 13:04:34 +00:00
xilinx_zynq.c
xlnx-versal-virt.c
xlnx-versal.c
xlnx-zcu102.c
xlnx-zynqmp.c
z2.c