qemu-e2k/target-cris/mmu.h
edgar_igl cf1d97f074 CRIS: Improve TLB management and handle delayslots at page boundaries.
* Dont flush the entire qemu tlb when the $pid changes. Instead we go through
  the guests TLB and choose entries that need to be flushed.
* Add env->dslot and handle delayslots at pageboundaries.
* Remove some unused code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4450 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-13 10:59:14 +00:00

18 lines
381 B
C

#define CRIS_MMU_ERR_EXEC 0
#define CRIS_MMU_ERR_READ 1
#define CRIS_MMU_ERR_WRITE 2
#define CRIS_MMU_ERR_FLUSH 3
struct cris_mmu_result_t
{
uint32_t phy;
uint32_t pfn;
int prot;
int bf_vec;
};
void cris_mmu_flush_pid(CPUState *env, uint32_t pid);
int cris_mmu_translate(struct cris_mmu_result_t *res,
CPUState *env, uint32_t vaddr,
int rw, int mmu_idx);