069d296669
Give current QEMU version string to SeaBIOS-hppa via fw_cfg interface so that the firmware can show the QEMU version in the boot menu info. Signed-off-by: Helge Deller <deller@gmx.de>
498 lines
16 KiB
C
498 lines
16 KiB
C
/*
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* QEMU HPPA hardware system emulator.
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* Copyright 2018 Helge Deller <deller@gmx.de>
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*/
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#include "qemu/osdep.h"
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#include "qemu/datadir.h"
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#include "cpu.h"
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#include "elf.h"
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#include "hw/loader.h"
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#include "qemu/error-report.h"
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#include "sysemu/reset.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/runstate.h"
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#include "hw/rtc/mc146818rtc.h"
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#include "hw/timer/i8254.h"
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#include "hw/char/serial.h"
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#include "hw/char/parallel.h"
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#include "hw/intc/i8259.h"
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#include "hw/input/lasips2.h"
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#include "hw/net/lasi_82596.h"
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#include "hw/nmi.h"
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#include "hw/pci/pci.h"
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#include "hw/pci-host/dino.h"
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#include "hw/misc/lasi.h"
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#include "hppa_hardware.h"
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#include "qemu/units.h"
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#include "qapi/error.h"
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#include "net/net.h"
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#include "qemu/log.h"
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#define MIN_SEABIOS_HPPA_VERSION 6 /* require at least this fw version */
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#define HPA_POWER_BUTTON (FIRMWARE_END - 0x10)
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#define enable_lasi_lan() 0
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static void hppa_powerdown_req(Notifier *n, void *opaque)
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{
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hwaddr soft_power_reg = HPA_POWER_BUTTON;
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uint32_t val;
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val = ldl_be_phys(&address_space_memory, soft_power_reg);
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if ((val >> 8) == 0) {
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/* immediately shut down when under hardware control */
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qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
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return;
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}
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/* clear bit 31 to indicate that the power switch was pressed. */
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val &= ~1;
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stl_be_phys(&address_space_memory, soft_power_reg, val);
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}
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static Notifier hppa_system_powerdown_notifier = {
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.notify = hppa_powerdown_req
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};
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/* Fallback for unassigned PCI I/O operations. Avoids MCHK. */
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static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size)
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{
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return 0;
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}
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static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size)
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{
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}
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static const MemoryRegionOps hppa_pci_ignore_ops = {
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.read = ignore_read,
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.write = ignore_write,
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.endianness = DEVICE_BIG_ENDIAN,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 8,
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},
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.impl = {
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.min_access_size = 1,
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.max_access_size = 8,
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},
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};
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static ISABus *hppa_isa_bus(void)
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{
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ISABus *isa_bus;
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qemu_irq *isa_irqs;
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MemoryRegion *isa_region;
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isa_region = g_new(MemoryRegion, 1);
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memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops,
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NULL, "isa-io", 0x800);
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memory_region_add_subregion(get_system_memory(), IDE_HPA,
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isa_region);
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isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region,
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&error_abort);
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isa_irqs = i8259_init(isa_bus,
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/* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */
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NULL);
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isa_bus_register_input_irqs(isa_bus, isa_irqs);
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return isa_bus;
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}
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static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr)
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{
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addr &= (0x10000000 - 1);
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return addr;
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}
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static HPPACPU *cpu[HPPA_MAX_CPUS];
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static uint64_t firmware_entry;
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static void fw_cfg_boot_set(void *opaque, const char *boot_device,
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Error **errp)
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{
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fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
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}
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static FWCfgState *create_fw_cfg(MachineState *ms)
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{
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FWCfgState *fw_cfg;
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uint64_t val;
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const char qemu_version[] = QEMU_VERSION;
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fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4);
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fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus);
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fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS);
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fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size);
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val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION);
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fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
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g_memdup(&val, sizeof(val)), sizeof(val));
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val = cpu_to_le64(HPPA_TLB_ENTRIES);
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fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
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g_memdup(&val, sizeof(val)), sizeof(val));
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val = cpu_to_le64(HPPA_BTLB_ENTRIES);
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fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
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g_memdup(&val, sizeof(val)), sizeof(val));
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val = cpu_to_le64(HPA_POWER_BUTTON);
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fw_cfg_add_file(fw_cfg, "/etc/power-button-addr",
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g_memdup(&val, sizeof(val)), sizeof(val));
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fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]);
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qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
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fw_cfg_add_file(fw_cfg, "/etc/qemu-version",
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g_memdup(qemu_version, sizeof(qemu_version)),
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sizeof(qemu_version));
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return fw_cfg;
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}
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static LasiState *lasi_init(void)
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{
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DeviceState *dev;
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dev = qdev_new(TYPE_LASI_CHIP);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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return LASI_CHIP(dev);
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}
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static DinoState *dino_init(MemoryRegion *addr_space)
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{
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DeviceState *dev;
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dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE);
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object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space),
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&error_fatal);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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return DINO_PCI_HOST_BRIDGE(dev);
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}
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static void machine_hppa_init(MachineState *machine)
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{
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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const char *initrd_filename = machine->initrd_filename;
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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DeviceState *dev, *dino_dev, *lasi_dev;
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PCIBus *pci_bus;
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ISABus *isa_bus;
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char *firmware_filename;
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uint64_t firmware_low, firmware_high;
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long size;
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uint64_t kernel_entry = 0, kernel_low, kernel_high;
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MemoryRegion *addr_space = get_system_memory();
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MemoryRegion *rom_region;
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MemoryRegion *cpu_region;
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long i;
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unsigned int smp_cpus = machine->smp.cpus;
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SysBusDevice *s;
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/* Create CPUs. */
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for (i = 0; i < smp_cpus; i++) {
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char *name = g_strdup_printf("cpu%ld-io-eir", i);
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cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type));
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cpu_region = g_new(MemoryRegion, 1);
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memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops,
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cpu[i], name, 4);
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memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000,
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cpu_region);
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g_free(name);
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}
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/* Main memory region. */
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if (machine->ram_size > 3 * GiB) {
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error_report("RAM size is currently restricted to 3GB");
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exit(EXIT_FAILURE);
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}
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memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1);
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/* Init Lasi chip */
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lasi_dev = DEVICE(lasi_init());
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memory_region_add_subregion(addr_space, LASI_HPA,
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sysbus_mmio_get_region(
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SYS_BUS_DEVICE(lasi_dev), 0));
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/* Init Dino (PCI host bus chip). */
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dino_dev = DEVICE(dino_init(addr_space));
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memory_region_add_subregion(addr_space, DINO_HPA,
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sysbus_mmio_get_region(
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SYS_BUS_DEVICE(dino_dev), 0));
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pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci"));
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assert(pci_bus);
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/* Create ISA bus. */
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isa_bus = hppa_isa_bus();
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assert(isa_bus);
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/* Realtime clock, used by firmware for PDC_TOD call. */
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mc146818_rtc_init(isa_bus, 2000, NULL);
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/* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */
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serial_mm_init(addr_space, LASI_UART_HPA + 0x800, 0,
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qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16,
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serial_hd(0), DEVICE_BIG_ENDIAN);
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serial_mm_init(addr_space, DINO_UART_HPA + 0x800, 0,
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qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16,
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serial_hd(1), DEVICE_BIG_ENDIAN);
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/* Parallel port */
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parallel_mm_init(addr_space, LASI_LPT_HPA + 0x800, 0,
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qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA),
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parallel_hds[0]);
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/* fw_cfg configuration interface */
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create_fw_cfg(machine);
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/* SCSI disk setup. */
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dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
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lsi53c8xx_handle_legacy_cmdline(dev);
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/* Graphics setup. */
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if (machine->enable_graphics && vga_interface_type != VGA_NONE) {
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vga_interface_created = true;
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dev = qdev_new("artist");
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s = SYS_BUS_DEVICE(dev);
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sysbus_realize_and_unref(s, &error_fatal);
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sysbus_mmio_map(s, 0, LASI_GFX_HPA);
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sysbus_mmio_map(s, 1, ARTIST_FB_ADDR);
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}
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/* Network setup. */
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if (enable_lasi_lan()) {
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lasi_82596_init(addr_space, LASI_LAN_HPA,
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qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA));
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}
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for (i = 0; i < nb_nics; i++) {
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if (!enable_lasi_lan()) {
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pci_nic_init_nofail(&nd_table[i], pci_bus, mc->default_nic, NULL);
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}
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}
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/* PS/2 Keyboard/Mouse */
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dev = qdev_new(TYPE_LASIPS2);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
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qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA));
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memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(dev),
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0));
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memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA + 0x100,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(dev),
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1));
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/* register power switch emulation */
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qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier);
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/* Load firmware. Given that this is not "real" firmware,
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but one explicitly written for the emulation, we might as
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well load it directly from an ELF image. */
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firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
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machine->firmware ?: "hppa-firmware.img");
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if (firmware_filename == NULL) {
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error_report("no firmware provided");
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exit(1);
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}
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size = load_elf(firmware_filename, NULL, NULL, NULL,
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&firmware_entry, &firmware_low, &firmware_high, NULL,
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true, EM_PARISC, 0, 0);
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/* Unfortunately, load_elf sign-extends reading elf32. */
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firmware_entry = (target_ureg)firmware_entry;
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firmware_low = (target_ureg)firmware_low;
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firmware_high = (target_ureg)firmware_high;
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if (size < 0) {
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error_report("could not load firmware '%s'", firmware_filename);
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exit(1);
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}
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qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64
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"-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n",
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firmware_low, firmware_high, firmware_entry);
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if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) {
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error_report("Firmware overlaps with memory or IO space");
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exit(1);
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}
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g_free(firmware_filename);
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rom_region = g_new(MemoryRegion, 1);
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memory_region_init_ram(rom_region, NULL, "firmware",
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(FIRMWARE_END - FIRMWARE_START), &error_fatal);
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memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region);
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/* Load kernel */
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if (kernel_filename) {
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size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys,
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NULL, &kernel_entry, &kernel_low, &kernel_high, NULL,
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true, EM_PARISC, 0, 0);
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/* Unfortunately, load_elf sign-extends reading elf32. */
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kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry);
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kernel_low = (target_ureg)kernel_low;
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kernel_high = (target_ureg)kernel_high;
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if (size < 0) {
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error_report("could not load kernel '%s'", kernel_filename);
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exit(1);
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}
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qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64
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"-0x%08" PRIx64 ", entry at 0x%08" PRIx64
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", size %" PRIu64 " kB\n",
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kernel_low, kernel_high, kernel_entry, size / KiB);
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if (kernel_cmdline) {
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cpu[0]->env.gr[24] = 0x4000;
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pstrcpy_targphys("cmdline", cpu[0]->env.gr[24],
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TARGET_PAGE_SIZE, kernel_cmdline);
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}
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if (initrd_filename) {
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ram_addr_t initrd_base;
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int64_t initrd_size;
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initrd_size = get_image_size(initrd_filename);
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if (initrd_size < 0) {
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error_report("could not load initial ram disk '%s'",
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initrd_filename);
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exit(1);
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}
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/* Load the initrd image high in memory.
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Mirror the algorithm used by palo:
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(1) Due to sign-extension problems and PDC,
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put the initrd no higher than 1G.
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(2) Reserve 64k for stack. */
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initrd_base = MIN(machine->ram_size, 1 * GiB);
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initrd_base = initrd_base - 64 * KiB;
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initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;
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if (initrd_base < kernel_high) {
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error_report("kernel and initial ram disk too large!");
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exit(1);
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}
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load_image_targphys(initrd_filename, initrd_base, initrd_size);
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cpu[0]->env.gr[23] = initrd_base;
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cpu[0]->env.gr[22] = initrd_base + initrd_size;
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}
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}
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if (!kernel_entry) {
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/* When booting via firmware, tell firmware if we want interactive
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* mode (kernel_entry=1), and to boot from CD (gr[24]='d')
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* or hard disc * (gr[24]='c').
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*/
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kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0;
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cpu[0]->env.gr[24] = machine->boot_config.order[0];
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}
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/* We jump to the firmware entry routine and pass the
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* various parameters in registers. After firmware initialization,
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* firmware will start the Linux kernel with ramdisk and cmdline.
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*/
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cpu[0]->env.gr[26] = machine->ram_size;
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cpu[0]->env.gr[25] = kernel_entry;
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/* tell firmware how many SMP CPUs to present in inventory table */
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cpu[0]->env.gr[21] = smp_cpus;
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/* tell firmware fw_cfg port */
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cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
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}
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static void hppa_machine_reset(MachineState *ms, ShutdownCause reason)
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{
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unsigned int smp_cpus = ms->smp.cpus;
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int i;
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qemu_devices_reset(reason);
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/* Start all CPUs at the firmware entry point.
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* Monarch CPU will initialize firmware, secondary CPUs
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* will enter a small idle loop and wait for rendevouz. */
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for (i = 0; i < smp_cpus; i++) {
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CPUState *cs = CPU(cpu[i]);
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cpu_set_pc(cs, firmware_entry);
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cpu[i]->env.psw = PSW_Q;
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cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000;
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cs->exception_index = -1;
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cs->halted = 0;
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}
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/* already initialized by machine_hppa_init()? */
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if (cpu[0]->env.gr[26] == ms->ram_size) {
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return;
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}
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cpu[0]->env.gr[26] = ms->ram_size;
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cpu[0]->env.gr[25] = 0; /* no firmware boot menu */
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cpu[0]->env.gr[24] = 'c';
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/* gr22/gr23 unused, no initrd while reboot. */
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cpu[0]->env.gr[21] = smp_cpus;
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/* tell firmware fw_cfg port */
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cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
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}
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static void hppa_nmi(NMIState *n, int cpu_index, Error **errp)
|
|
{
|
|
CPUState *cs;
|
|
|
|
CPU_FOREACH(cs) {
|
|
cpu_interrupt(cs, CPU_INTERRUPT_NMI);
|
|
}
|
|
}
|
|
|
|
static void hppa_machine_init_class_init(ObjectClass *oc, void *data)
|
|
{
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
NMIClass *nc = NMI_CLASS(oc);
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|
|
|
mc->desc = "HPPA B160L machine";
|
|
mc->default_cpu_type = TYPE_HPPA_CPU;
|
|
mc->init = machine_hppa_init;
|
|
mc->reset = hppa_machine_reset;
|
|
mc->block_default_type = IF_SCSI;
|
|
mc->max_cpus = HPPA_MAX_CPUS;
|
|
mc->default_cpus = 1;
|
|
mc->is_default = true;
|
|
mc->default_ram_size = 512 * MiB;
|
|
mc->default_boot_order = "cd";
|
|
mc->default_ram_id = "ram";
|
|
mc->default_nic = "tulip";
|
|
|
|
nc->nmi_monitor_handler = hppa_nmi;
|
|
}
|
|
|
|
static const TypeInfo hppa_machine_init_typeinfo = {
|
|
.name = MACHINE_TYPE_NAME("hppa"),
|
|
.parent = TYPE_MACHINE,
|
|
.class_init = hppa_machine_init_class_init,
|
|
.interfaces = (InterfaceInfo[]) {
|
|
{ TYPE_NMI },
|
|
{ }
|
|
},
|
|
};
|
|
|
|
static void hppa_machine_init_register_types(void)
|
|
{
|
|
type_register_static(&hppa_machine_init_typeinfo);
|
|
}
|
|
|
|
type_init(hppa_machine_init_register_types)
|