8346901560
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1514 c046a42c-6fe2-441c-8c8c-71466251a162
518 lines
18 KiB
Plaintext
518 lines
18 KiB
Plaintext
\input texinfo @c -*- texinfo -*-
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@iftex
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@settitle QEMU Internals
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@titlepage
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@sp 7
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@center @titlefont{QEMU Internals}
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@sp 3
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@end titlepage
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@end iftex
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@chapter Introduction
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@section Features
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QEMU is a FAST! processor emulator using a portable dynamic
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translator.
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QEMU has two operating modes:
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@itemize @minus
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@item
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Full system emulation. In this mode, QEMU emulates a full system
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(usually a PC), including a processor and various peripherals. It can
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be used to launch an different Operating System without rebooting the
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PC or to debug system code.
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@item
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User mode emulation (Linux host only). In this mode, QEMU can launch
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Linux processes compiled for one CPU on another CPU. It can be used to
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launch the Wine Windows API emulator (@url{http://www.winehq.org}) or
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to ease cross-compilation and cross-debugging.
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@end itemize
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As QEMU requires no host kernel driver to run, it is very safe and
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easy to use.
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QEMU generic features:
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@itemize
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@item User space only or full system emulation.
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@item Using dynamic translation to native code for reasonnable speed.
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@item Working on x86 and PowerPC hosts. Being tested on ARM, Sparc32, Alpha and S390.
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@item Self-modifying code support.
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@item Precise exceptions support.
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@item The virtual CPU is a library (@code{libqemu}) which can be used
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in other projects (look at @file{qemu/tests/qruncom.c} to have an
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example of user mode @code{libqemu} usage).
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@end itemize
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QEMU user mode emulation features:
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@itemize
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@item Generic Linux system call converter, including most ioctls.
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@item clone() emulation using native CPU clone() to use Linux scheduler for threads.
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@item Accurate signal handling by remapping host signals to target signals.
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@end itemize
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@end itemize
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QEMU full system emulation features:
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@itemize
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@item QEMU can either use a full software MMU for maximum portability or use the host system call mmap() to simulate the target MMU.
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@end itemize
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@section x86 emulation
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QEMU x86 target features:
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@itemize
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@item The virtual x86 CPU supports 16 bit and 32 bit addressing with segmentation.
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LDT/GDT and IDT are emulated. VM86 mode is also supported to run DOSEMU.
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@item Support of host page sizes bigger than 4KB in user mode emulation.
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@item QEMU can emulate itself on x86.
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@item An extensive Linux x86 CPU test program is included @file{tests/test-i386}.
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It can be used to test other x86 virtual CPUs.
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@end itemize
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Current QEMU limitations:
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@itemize
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@item No SSE/MMX support (yet).
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@item No x86-64 support.
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@item IPC syscalls are missing.
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@item The x86 segment limits and access rights are not tested at every
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memory access (yet). Hopefully, very few OSes seem to rely on that for
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normal use.
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@item On non x86 host CPUs, @code{double}s are used instead of the non standard
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10 byte @code{long double}s of x86 for floating point emulation to get
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maximum performances.
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@end itemize
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@section ARM emulation
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@itemize
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@item Full ARM 7 user emulation.
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@item NWFPE FPU support included in user Linux emulation.
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@item Can run most ARM Linux binaries.
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@end itemize
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@section PowerPC emulation
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@itemize
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@item Full PowerPC 32 bit emulation, including privileged instructions,
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FPU and MMU.
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@item Can run most PowerPC Linux binaries.
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@end itemize
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@section SPARC emulation
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@itemize
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@item Somewhat complete SPARC V8 emulation, including privileged
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instructions, FPU and MMU. SPARC V9 emulation includes most privileged
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instructions, FPU and I/D MMU, but misses VIS instructions.
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@item Can run some 32-bit SPARC Linux binaries.
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@end itemize
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Current QEMU limitations:
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@itemize
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@item Tagged add/subtract instructions are not supported, but they are
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probably not used.
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@item IPC syscalls are missing.
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@item 128-bit floating point operations are not supported, though none of the
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real CPUs implement them either. FCMPE[SD] are not correctly
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implemented. Floating point exception support is untested.
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@item Alignment is not enforced at all.
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@item Atomic instructions are not correctly implemented.
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@item Sparc64 emulators are not usable for anything yet.
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@end itemize
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@chapter QEMU Internals
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@section QEMU compared to other emulators
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Like bochs [3], QEMU emulates an x86 CPU. But QEMU is much faster than
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bochs as it uses dynamic compilation. Bochs is closely tied to x86 PC
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emulation while QEMU can emulate several processors.
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Like Valgrind [2], QEMU does user space emulation and dynamic
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translation. Valgrind is mainly a memory debugger while QEMU has no
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support for it (QEMU could be used to detect out of bound memory
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accesses as Valgrind, but it has no support to track uninitialised data
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as Valgrind does). The Valgrind dynamic translator generates better code
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than QEMU (in particular it does register allocation) but it is closely
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tied to an x86 host and target and has no support for precise exceptions
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and system emulation.
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EM86 [4] is the closest project to user space QEMU (and QEMU still uses
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some of its code, in particular the ELF file loader). EM86 was limited
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to an alpha host and used a proprietary and slow interpreter (the
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interpreter part of the FX!32 Digital Win32 code translator [5]).
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TWIN [6] is a Windows API emulator like Wine. It is less accurate than
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Wine but includes a protected mode x86 interpreter to launch x86 Windows
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executables. Such an approach has greater potential because most of the
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Windows API is executed natively but it is far more difficult to develop
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because all the data structures and function parameters exchanged
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between the API and the x86 code must be converted.
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User mode Linux [7] was the only solution before QEMU to launch a
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Linux kernel as a process while not needing any host kernel
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patches. However, user mode Linux requires heavy kernel patches while
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QEMU accepts unpatched Linux kernels. The price to pay is that QEMU is
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slower.
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The new Plex86 [8] PC virtualizer is done in the same spirit as the
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qemu-fast system emulator. It requires a patched Linux kernel to work
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(you cannot launch the same kernel on your PC), but the patches are
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really small. As it is a PC virtualizer (no emulation is done except
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for some priveledged instructions), it has the potential of being
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faster than QEMU. The downside is that a complicated (and potentially
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unsafe) host kernel patch is needed.
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The commercial PC Virtualizers (VMWare [9], VirtualPC [10], TwoOStwo
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[11]) are faster than QEMU, but they all need specific, proprietary
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and potentially unsafe host drivers. Moreover, they are unable to
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provide cycle exact simulation as an emulator can.
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@section Portable dynamic translation
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QEMU is a dynamic translator. When it first encounters a piece of code,
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it converts it to the host instruction set. Usually dynamic translators
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are very complicated and highly CPU dependent. QEMU uses some tricks
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which make it relatively easily portable and simple while achieving good
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performances.
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The basic idea is to split every x86 instruction into fewer simpler
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instructions. Each simple instruction is implemented by a piece of C
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code (see @file{target-i386/op.c}). Then a compile time tool
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(@file{dyngen}) takes the corresponding object file (@file{op.o})
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to generate a dynamic code generator which concatenates the simple
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instructions to build a function (see @file{op.h:dyngen_code()}).
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In essence, the process is similar to [1], but more work is done at
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compile time.
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A key idea to get optimal performances is that constant parameters can
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be passed to the simple operations. For that purpose, dummy ELF
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relocations are generated with gcc for each constant parameter. Then,
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the tool (@file{dyngen}) can locate the relocations and generate the
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appriopriate C code to resolve them when building the dynamic code.
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That way, QEMU is no more difficult to port than a dynamic linker.
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To go even faster, GCC static register variables are used to keep the
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state of the virtual CPU.
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@section Register allocation
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Since QEMU uses fixed simple instructions, no efficient register
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allocation can be done. However, because RISC CPUs have a lot of
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register, most of the virtual CPU state can be put in registers without
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doing complicated register allocation.
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@section Condition code optimisations
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Good CPU condition codes emulation (@code{EFLAGS} register on x86) is a
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critical point to get good performances. QEMU uses lazy condition code
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evaluation: instead of computing the condition codes after each x86
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instruction, it just stores one operand (called @code{CC_SRC}), the
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result (called @code{CC_DST}) and the type of operation (called
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@code{CC_OP}).
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@code{CC_OP} is almost never explicitely set in the generated code
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because it is known at translation time.
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In order to increase performances, a backward pass is performed on the
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generated simple instructions (see
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@code{target-i386/translate.c:optimize_flags()}). When it can be proved that
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the condition codes are not needed by the next instructions, no
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condition codes are computed at all.
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@section CPU state optimisations
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The x86 CPU has many internal states which change the way it evaluates
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instructions. In order to achieve a good speed, the translation phase
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considers that some state information of the virtual x86 CPU cannot
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change in it. For example, if the SS, DS and ES segments have a zero
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base, then the translator does not even generate an addition for the
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segment base.
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[The FPU stack pointer register is not handled that way yet].
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@section Translation cache
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A 16 MByte cache holds the most recently used translations. For
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simplicity, it is completely flushed when it is full. A translation unit
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contains just a single basic block (a block of x86 instructions
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terminated by a jump or by a virtual CPU state change which the
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translator cannot deduce statically).
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@section Direct block chaining
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After each translated basic block is executed, QEMU uses the simulated
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Program Counter (PC) and other cpu state informations (such as the CS
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segment base value) to find the next basic block.
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In order to accelerate the most common cases where the new simulated PC
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is known, QEMU can patch a basic block so that it jumps directly to the
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next one.
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The most portable code uses an indirect jump. An indirect jump makes
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it easier to make the jump target modification atomic. On some host
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architectures (such as x86 or PowerPC), the @code{JUMP} opcode is
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directly patched so that the block chaining has no overhead.
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@section Self-modifying code and translated code invalidation
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Self-modifying code is a special challenge in x86 emulation because no
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instruction cache invalidation is signaled by the application when code
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is modified.
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When translated code is generated for a basic block, the corresponding
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host page is write protected if it is not already read-only (with the
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system call @code{mprotect()}). Then, if a write access is done to the
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page, Linux raises a SEGV signal. QEMU then invalidates all the
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translated code in the page and enables write accesses to the page.
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Correct translated code invalidation is done efficiently by maintaining
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a linked list of every translated block contained in a given page. Other
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linked lists are also maintained to undo direct block chaining.
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Although the overhead of doing @code{mprotect()} calls is important,
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most MSDOS programs can be emulated at reasonnable speed with QEMU and
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DOSEMU.
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Note that QEMU also invalidates pages of translated code when it detects
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that memory mappings are modified with @code{mmap()} or @code{munmap()}.
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When using a software MMU, the code invalidation is more efficient: if
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a given code page is invalidated too often because of write accesses,
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then a bitmap representing all the code inside the page is
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built. Every store into that page checks the bitmap to see if the code
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really needs to be invalidated. It avoids invalidating the code when
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only data is modified in the page.
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@section Exception support
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longjmp() is used when an exception such as division by zero is
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encountered.
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The host SIGSEGV and SIGBUS signal handlers are used to get invalid
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memory accesses. The exact CPU state can be retrieved because all the
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x86 registers are stored in fixed host registers. The simulated program
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counter is found by retranslating the corresponding basic block and by
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looking where the host program counter was at the exception point.
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The virtual CPU cannot retrieve the exact @code{EFLAGS} register because
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in some cases it is not computed because of condition code
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optimisations. It is not a big concern because the emulated code can
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still be restarted in any cases.
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@section MMU emulation
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For system emulation, QEMU uses the mmap() system call to emulate the
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target CPU MMU. It works as long the emulated OS does not use an area
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reserved by the host OS (such as the area above 0xc0000000 on x86
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Linux).
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In order to be able to launch any OS, QEMU also supports a soft
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MMU. In that mode, the MMU virtual to physical address translation is
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done at every memory access. QEMU uses an address translation cache to
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speed up the translation.
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In order to avoid flushing the translated code each time the MMU
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mappings change, QEMU uses a physically indexed translation cache. It
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means that each basic block is indexed with its physical address.
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When MMU mappings change, only the chaining of the basic blocks is
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reset (i.e. a basic block can no longer jump directly to another one).
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@section Hardware interrupts
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In order to be faster, QEMU does not check at every basic block if an
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hardware interrupt is pending. Instead, the user must asynchrously
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call a specific function to tell that an interrupt is pending. This
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function resets the chaining of the currently executing basic
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block. It ensures that the execution will return soon in the main loop
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of the CPU emulator. Then the main loop can test if the interrupt is
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pending and handle it.
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@section User emulation specific details
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@subsection Linux system call translation
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QEMU includes a generic system call translator for Linux. It means that
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the parameters of the system calls can be converted to fix the
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endianness and 32/64 bit issues. The IOCTLs are converted with a generic
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type description system (see @file{ioctls.h} and @file{thunk.c}).
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QEMU supports host CPUs which have pages bigger than 4KB. It records all
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the mappings the process does and try to emulated the @code{mmap()}
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system calls in cases where the host @code{mmap()} call would fail
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because of bad page alignment.
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@subsection Linux signals
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Normal and real-time signals are queued along with their information
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(@code{siginfo_t}) as it is done in the Linux kernel. Then an interrupt
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request is done to the virtual CPU. When it is interrupted, one queued
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signal is handled by generating a stack frame in the virtual CPU as the
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Linux kernel does. The @code{sigreturn()} system call is emulated to return
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from the virtual signal handler.
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Some signals (such as SIGALRM) directly come from the host. Other
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signals are synthetized from the virtual CPU exceptions such as SIGFPE
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when a division by zero is done (see @code{main.c:cpu_loop()}).
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The blocked signal mask is still handled by the host Linux kernel so
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that most signal system calls can be redirected directly to the host
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Linux kernel. Only the @code{sigaction()} and @code{sigreturn()} system
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calls need to be fully emulated (see @file{signal.c}).
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@subsection clone() system call and threads
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The Linux clone() system call is usually used to create a thread. QEMU
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uses the host clone() system call so that real host threads are created
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for each emulated thread. One virtual CPU instance is created for each
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thread.
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The virtual x86 CPU atomic operations are emulated with a global lock so
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that their semantic is preserved.
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Note that currently there are still some locking issues in QEMU. In
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particular, the translated cache flush is not protected yet against
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reentrancy.
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@subsection Self-virtualization
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QEMU was conceived so that ultimately it can emulate itself. Although
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it is not very useful, it is an important test to show the power of the
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emulator.
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Achieving self-virtualization is not easy because there may be address
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space conflicts. QEMU solves this problem by being an executable ELF
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shared object as the ld-linux.so ELF interpreter. That way, it can be
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relocated at load time.
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@section Bibliography
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@table @asis
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@item [1]
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@url{http://citeseer.nj.nec.com/piumarta98optimizing.html}, Optimizing
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direct threaded code by selective inlining (1998) by Ian Piumarta, Fabio
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Riccardi.
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@item [2]
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@url{http://developer.kde.org/~sewardj/}, Valgrind, an open-source
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memory debugger for x86-GNU/Linux, by Julian Seward.
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@item [3]
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@url{http://bochs.sourceforge.net/}, the Bochs IA-32 Emulator Project,
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by Kevin Lawton et al.
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@item [4]
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@url{http://www.cs.rose-hulman.edu/~donaldlf/em86/index.html}, the EM86
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x86 emulator on Alpha-Linux.
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@item [5]
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@url{http://www.usenix.org/publications/library/proceedings/usenix-nt97/full_papers/chernoff/chernoff.pdf},
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DIGITAL FX!32: Running 32-Bit x86 Applications on Alpha NT, by Anton
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Chernoff and Ray Hookway.
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@item [6]
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@url{http://www.willows.com/}, Windows API library emulation from
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Willows Software.
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@item [7]
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@url{http://user-mode-linux.sourceforge.net/},
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The User-mode Linux Kernel.
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@item [8]
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@url{http://www.plex86.org/},
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The new Plex86 project.
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@item [9]
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@url{http://www.vmware.com/},
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The VMWare PC virtualizer.
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@item [10]
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@url{http://www.microsoft.com/windowsxp/virtualpc/},
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The VirtualPC PC virtualizer.
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@item [11]
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@url{http://www.twoostwo.org/},
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The TwoOStwo PC virtualizer.
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@end table
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@chapter Regression Tests
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In the directory @file{tests/}, various interesting testing programs
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are available. There are used for regression testing.
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@section @file{test-i386}
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This program executes most of the 16 bit and 32 bit x86 instructions and
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generates a text output. It can be compared with the output obtained with
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a real CPU or another emulator. The target @code{make test} runs this
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program and a @code{diff} on the generated output.
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The Linux system call @code{modify_ldt()} is used to create x86 selectors
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to test some 16 bit addressing and 32 bit with segmentation cases.
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The Linux system call @code{vm86()} is used to test vm86 emulation.
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Various exceptions are raised to test most of the x86 user space
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exception reporting.
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@section @file{linux-test}
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This program tests various Linux system calls. It is used to verify
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that the system call parameters are correctly converted between target
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and host CPUs.
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@section @file{qruncom.c}
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Example of usage of @code{libqemu} to emulate a user mode i386 CPU.
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