4b635cf7a9
For the IoTKit the SRAM bank size is always 32K (15 bits); for the SSE-200 this is a configurable parameter, which defaults to 32K but can be changed when it is built into a particular SoC. For instance the Musca-B1 board sets it to 128K (17 bits). Make the bank size a QOM property. We follow the SSE-200 hardware in naming the parameter SRAM_ADDR_WIDTH, which specifies the number of address bits of a single SRAM bank. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190121185118.18550-11-peter.maydell@linaro.org |
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| .. | ||
| allwinner-a10.c | ||
| armsse.c | ||
| armv7m.c | ||
| aspeed_soc.c | ||
| aspeed.c | ||
| bcm2835_peripherals.c | ||
| bcm2836.c | ||
| boot.c | ||
| collie.c | ||
| cubieboard.c | ||
| digic_boards.c | ||
| digic.c | ||
| exynos4_boards.c | ||
| exynos4210.c | ||
| fsl-imx6.c | ||
| fsl-imx6ul.c | ||
| fsl-imx7.c | ||
| fsl-imx25.c | ||
| fsl-imx31.c | ||
| gumstix.c | ||
| highbank.c | ||
| imx25_pdk.c | ||
| integratorcp.c | ||
| kzm.c | ||
| mainstone.c | ||
| Makefile.objs | ||
| mcimx6ul-evk.c | ||
| mcimx7d-sabre.c | ||
| microbit.c | ||
| mps2-tz.c | ||
| mps2.c | ||
| msf2-soc.c | ||
| msf2-som.c | ||
| musicpal.c | ||
| netduino2.c | ||
| nrf51_soc.c | ||
| nseries.c | ||
| omap1.c | ||
| omap2.c | ||
| omap_sx1.c | ||
| palm.c | ||
| pxa2xx_gpio.c | ||
| pxa2xx_pic.c | ||
| pxa2xx.c | ||
| raspi.c | ||
| realview.c | ||
| sabrelite.c | ||
| smmu-common.c | ||
| smmu-internal.h | ||
| smmuv3-internal.h | ||
| smmuv3.c | ||
| spitz.c | ||
| stellaris.c | ||
| stm32f205_soc.c | ||
| strongarm.c | ||
| strongarm.h | ||
| sysbus-fdt.c | ||
| tosa.c | ||
| trace-events | ||
| versatilepb.c | ||
| vexpress.c | ||
| virt-acpi-build.c | ||
| virt.c | ||
| xilinx_zynq.c | ||
| xlnx-versal-virt.c | ||
| xlnx-versal.c | ||
| xlnx-zcu102.c | ||
| xlnx-zynqmp.c | ||
| z2.c | ||