4c88475c9f
When we added the fast path, we initialized page_addr[] early.
These stores in and around tb_page_add() are redundant; remove them.
Fixes: 50627f1b7b
("accel/tcg: Add fast path for translator_ld*")
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
712 lines
20 KiB
C
712 lines
20 KiB
C
/*
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* Translation Block Maintaince
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "exec/cputlb.h"
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#include "exec/log.h"
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#include "exec/translate-all.h"
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#include "sysemu/tcg.h"
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#include "tcg/tcg.h"
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#include "tb-hash.h"
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#include "tb-context.h"
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#include "internal.h"
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/* FIXME: tb_invalidate_phys_range is declared in different places. */
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#ifdef CONFIG_USER_ONLY
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#include "exec/exec-all.h"
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#else
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#include "exec/ram_addr.h"
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#endif
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static bool tb_cmp(const void *ap, const void *bp)
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{
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const TranslationBlock *a = ap;
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const TranslationBlock *b = bp;
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return ((TARGET_TB_PCREL || tb_pc(a) == tb_pc(b)) &&
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a->cs_base == b->cs_base &&
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a->flags == b->flags &&
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(tb_cflags(a) & ~CF_INVALID) == (tb_cflags(b) & ~CF_INVALID) &&
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a->trace_vcpu_dstate == b->trace_vcpu_dstate &&
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a->page_addr[0] == b->page_addr[0] &&
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a->page_addr[1] == b->page_addr[1]);
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}
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void tb_htable_init(void)
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{
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unsigned int mode = QHT_MODE_AUTO_RESIZE;
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qht_init(&tb_ctx.htable, tb_cmp, CODE_GEN_HTABLE_SIZE, mode);
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}
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/* Set to NULL all the 'first_tb' fields in all PageDescs. */
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static void page_flush_tb_1(int level, void **lp)
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{
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int i;
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if (*lp == NULL) {
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return;
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}
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if (level == 0) {
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PageDesc *pd = *lp;
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for (i = 0; i < V_L2_SIZE; ++i) {
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page_lock(&pd[i]);
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pd[i].first_tb = (uintptr_t)NULL;
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page_unlock(&pd[i]);
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}
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} else {
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void **pp = *lp;
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for (i = 0; i < V_L2_SIZE; ++i) {
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page_flush_tb_1(level - 1, pp + i);
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}
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}
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}
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static void page_flush_tb(void)
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{
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int i, l1_sz = v_l1_size;
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for (i = 0; i < l1_sz; i++) {
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page_flush_tb_1(v_l2_levels, l1_map + i);
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}
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}
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/* flush all the translation blocks */
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static void do_tb_flush(CPUState *cpu, run_on_cpu_data tb_flush_count)
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{
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bool did_flush = false;
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mmap_lock();
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/* If it is already been done on request of another CPU, just retry. */
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if (tb_ctx.tb_flush_count != tb_flush_count.host_int) {
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goto done;
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}
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did_flush = true;
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CPU_FOREACH(cpu) {
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tcg_flush_jmp_cache(cpu);
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}
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qht_reset_size(&tb_ctx.htable, CODE_GEN_HTABLE_SIZE);
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page_flush_tb();
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tcg_region_reset_all();
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/* XXX: flush processor icache at this point if cache flush is expensive */
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qatomic_mb_set(&tb_ctx.tb_flush_count, tb_ctx.tb_flush_count + 1);
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done:
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mmap_unlock();
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if (did_flush) {
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qemu_plugin_flush_cb();
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}
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}
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void tb_flush(CPUState *cpu)
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{
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if (tcg_enabled()) {
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unsigned tb_flush_count = qatomic_mb_read(&tb_ctx.tb_flush_count);
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if (cpu_in_exclusive_context(cpu)) {
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do_tb_flush(cpu, RUN_ON_CPU_HOST_INT(tb_flush_count));
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} else {
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async_safe_run_on_cpu(cpu, do_tb_flush,
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RUN_ON_CPU_HOST_INT(tb_flush_count));
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}
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}
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}
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/*
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* user-mode: call with mmap_lock held
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* !user-mode: call with @pd->lock held
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*/
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static inline void tb_page_remove(PageDesc *pd, TranslationBlock *tb)
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{
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TranslationBlock *tb1;
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uintptr_t *pprev;
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unsigned int n1;
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assert_page_locked(pd);
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pprev = &pd->first_tb;
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PAGE_FOR_EACH_TB(pd, tb1, n1) {
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if (tb1 == tb) {
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*pprev = tb1->page_next[n1];
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return;
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}
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pprev = &tb1->page_next[n1];
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}
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g_assert_not_reached();
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}
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/* remove @orig from its @n_orig-th jump list */
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static inline void tb_remove_from_jmp_list(TranslationBlock *orig, int n_orig)
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{
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uintptr_t ptr, ptr_locked;
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TranslationBlock *dest;
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TranslationBlock *tb;
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uintptr_t *pprev;
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int n;
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/* mark the LSB of jmp_dest[] so that no further jumps can be inserted */
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ptr = qatomic_or_fetch(&orig->jmp_dest[n_orig], 1);
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dest = (TranslationBlock *)(ptr & ~1);
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if (dest == NULL) {
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return;
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}
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qemu_spin_lock(&dest->jmp_lock);
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/*
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* While acquiring the lock, the jump might have been removed if the
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* destination TB was invalidated; check again.
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*/
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ptr_locked = qatomic_read(&orig->jmp_dest[n_orig]);
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if (ptr_locked != ptr) {
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qemu_spin_unlock(&dest->jmp_lock);
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/*
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* The only possibility is that the jump was unlinked via
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* tb_jump_unlink(dest). Seeing here another destination would be a bug,
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* because we set the LSB above.
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*/
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g_assert(ptr_locked == 1 && dest->cflags & CF_INVALID);
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return;
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}
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/*
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* We first acquired the lock, and since the destination pointer matches,
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* we know for sure that @orig is in the jmp list.
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*/
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pprev = &dest->jmp_list_head;
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TB_FOR_EACH_JMP(dest, tb, n) {
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if (tb == orig && n == n_orig) {
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*pprev = tb->jmp_list_next[n];
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/* no need to set orig->jmp_dest[n]; setting the LSB was enough */
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qemu_spin_unlock(&dest->jmp_lock);
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return;
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}
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pprev = &tb->jmp_list_next[n];
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}
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g_assert_not_reached();
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}
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/*
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* Reset the jump entry 'n' of a TB so that it is not chained to another TB.
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*/
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void tb_reset_jump(TranslationBlock *tb, int n)
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{
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uintptr_t addr = (uintptr_t)(tb->tc.ptr + tb->jmp_reset_offset[n]);
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tb_set_jmp_target(tb, n, addr);
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}
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/* remove any jumps to the TB */
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static inline void tb_jmp_unlink(TranslationBlock *dest)
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{
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TranslationBlock *tb;
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int n;
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qemu_spin_lock(&dest->jmp_lock);
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TB_FOR_EACH_JMP(dest, tb, n) {
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tb_reset_jump(tb, n);
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qatomic_and(&tb->jmp_dest[n], (uintptr_t)NULL | 1);
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/* No need to clear the list entry; setting the dest ptr is enough */
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}
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dest->jmp_list_head = (uintptr_t)NULL;
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qemu_spin_unlock(&dest->jmp_lock);
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}
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static void tb_jmp_cache_inval_tb(TranslationBlock *tb)
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{
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CPUState *cpu;
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if (TARGET_TB_PCREL) {
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/* A TB may be at any virtual address */
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CPU_FOREACH(cpu) {
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tcg_flush_jmp_cache(cpu);
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}
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} else {
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uint32_t h = tb_jmp_cache_hash_func(tb_pc(tb));
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CPU_FOREACH(cpu) {
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CPUJumpCache *jc = cpu->tb_jmp_cache;
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if (qatomic_read(&jc->array[h].tb) == tb) {
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qatomic_set(&jc->array[h].tb, NULL);
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}
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}
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}
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}
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/*
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* In user-mode, call with mmap_lock held.
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* In !user-mode, if @rm_from_page_list is set, call with the TB's pages'
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* locks held.
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*/
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static void do_tb_phys_invalidate(TranslationBlock *tb, bool rm_from_page_list)
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{
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PageDesc *p;
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uint32_t h;
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tb_page_addr_t phys_pc;
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uint32_t orig_cflags = tb_cflags(tb);
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assert_memory_lock();
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/* make sure no further incoming jumps will be chained to this TB */
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qemu_spin_lock(&tb->jmp_lock);
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qatomic_set(&tb->cflags, tb->cflags | CF_INVALID);
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qemu_spin_unlock(&tb->jmp_lock);
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/* remove the TB from the hash list */
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phys_pc = tb->page_addr[0];
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h = tb_hash_func(phys_pc, (TARGET_TB_PCREL ? 0 : tb_pc(tb)),
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tb->flags, orig_cflags, tb->trace_vcpu_dstate);
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if (!qht_remove(&tb_ctx.htable, tb, h)) {
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return;
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}
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/* remove the TB from the page list */
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if (rm_from_page_list) {
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p = page_find(tb->page_addr[0] >> TARGET_PAGE_BITS);
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tb_page_remove(p, tb);
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if (tb->page_addr[1] != -1) {
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p = page_find(tb->page_addr[1] >> TARGET_PAGE_BITS);
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tb_page_remove(p, tb);
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}
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}
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/* remove the TB from the hash list */
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tb_jmp_cache_inval_tb(tb);
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/* suppress this TB from the two jump lists */
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tb_remove_from_jmp_list(tb, 0);
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tb_remove_from_jmp_list(tb, 1);
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/* suppress any remaining jumps to this TB */
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tb_jmp_unlink(tb);
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qatomic_set(&tb_ctx.tb_phys_invalidate_count,
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tb_ctx.tb_phys_invalidate_count + 1);
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}
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static void tb_phys_invalidate__locked(TranslationBlock *tb)
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{
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qemu_thread_jit_write();
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do_tb_phys_invalidate(tb, true);
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qemu_thread_jit_execute();
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}
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static void page_lock_pair(PageDesc **ret_p1, tb_page_addr_t phys1,
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PageDesc **ret_p2, tb_page_addr_t phys2, bool alloc)
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{
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PageDesc *p1, *p2;
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tb_page_addr_t page1;
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tb_page_addr_t page2;
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assert_memory_lock();
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g_assert(phys1 != -1);
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page1 = phys1 >> TARGET_PAGE_BITS;
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page2 = phys2 >> TARGET_PAGE_BITS;
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p1 = page_find_alloc(page1, alloc);
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if (ret_p1) {
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*ret_p1 = p1;
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}
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if (likely(phys2 == -1)) {
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page_lock(p1);
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return;
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} else if (page1 == page2) {
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page_lock(p1);
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if (ret_p2) {
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*ret_p2 = p1;
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}
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return;
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}
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p2 = page_find_alloc(page2, alloc);
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if (ret_p2) {
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*ret_p2 = p2;
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}
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if (page1 < page2) {
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page_lock(p1);
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page_lock(p2);
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} else {
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page_lock(p2);
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page_lock(p1);
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}
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}
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#ifdef CONFIG_USER_ONLY
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static inline void page_lock_tb(const TranslationBlock *tb) { }
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static inline void page_unlock_tb(const TranslationBlock *tb) { }
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#else
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/* lock the page(s) of a TB in the correct acquisition order */
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static void page_lock_tb(const TranslationBlock *tb)
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{
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page_lock_pair(NULL, tb->page_addr[0], NULL, tb->page_addr[1], false);
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}
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static void page_unlock_tb(const TranslationBlock *tb)
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{
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PageDesc *p1 = page_find(tb->page_addr[0] >> TARGET_PAGE_BITS);
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page_unlock(p1);
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if (unlikely(tb->page_addr[1] != -1)) {
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PageDesc *p2 = page_find(tb->page_addr[1] >> TARGET_PAGE_BITS);
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if (p2 != p1) {
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page_unlock(p2);
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}
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}
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}
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#endif
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/*
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* Invalidate one TB.
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* Called with mmap_lock held in user-mode.
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*/
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void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr)
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{
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if (page_addr == -1 && tb->page_addr[0] != -1) {
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page_lock_tb(tb);
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do_tb_phys_invalidate(tb, true);
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page_unlock_tb(tb);
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} else {
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do_tb_phys_invalidate(tb, false);
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}
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}
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/*
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* Add the tb in the target page and protect it if necessary.
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* Called with mmap_lock held for user-mode emulation.
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* Called with @p->lock held in !user-mode.
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*/
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static inline void tb_page_add(PageDesc *p, TranslationBlock *tb,
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unsigned int n, tb_page_addr_t page_addr)
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{
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#ifndef CONFIG_USER_ONLY
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bool page_already_protected;
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#endif
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assert_page_locked(p);
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tb->page_next[n] = p->first_tb;
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#ifndef CONFIG_USER_ONLY
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page_already_protected = p->first_tb != (uintptr_t)NULL;
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#endif
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p->first_tb = (uintptr_t)tb | n;
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#if defined(CONFIG_USER_ONLY)
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/* translator_loop() must have made all TB pages non-writable */
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assert(!(p->flags & PAGE_WRITE));
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#else
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/*
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* If some code is already present, then the pages are already
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* protected. So we handle the case where only the first TB is
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* allocated in a physical page.
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*/
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if (!page_already_protected) {
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tlb_protect_code(page_addr);
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}
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#endif
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}
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/*
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* Add a new TB and link it to the physical page tables. phys_page2 is
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* (-1) to indicate that only one page contains the TB.
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*
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* Called with mmap_lock held for user-mode emulation.
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*
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* Returns a pointer @tb, or a pointer to an existing TB that matches @tb.
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* Note that in !user-mode, another thread might have already added a TB
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* for the same block of guest code that @tb corresponds to. In that case,
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* the caller should discard the original @tb, and use instead the returned TB.
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*/
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TranslationBlock *tb_link_page(TranslationBlock *tb, tb_page_addr_t phys_pc,
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tb_page_addr_t phys_page2)
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{
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PageDesc *p;
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PageDesc *p2 = NULL;
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void *existing_tb = NULL;
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uint32_t h;
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assert_memory_lock();
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tcg_debug_assert(!(tb->cflags & CF_INVALID));
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/*
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* Add the TB to the page list, acquiring first the pages's locks.
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* We keep the locks held until after inserting the TB in the hash table,
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* so that if the insertion fails we know for sure that the TBs are still
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* in the page descriptors.
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* Note that inserting into the hash table first isn't an option, since
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* we can only insert TBs that are fully initialized.
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*/
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page_lock_pair(&p, phys_pc, &p2, phys_page2, true);
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tb_page_add(p, tb, 0, phys_pc);
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if (p2) {
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tb_page_add(p2, tb, 1, phys_page2);
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}
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/* add in the hash table */
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h = tb_hash_func(phys_pc, (TARGET_TB_PCREL ? 0 : tb_pc(tb)),
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tb->flags, tb->cflags, tb->trace_vcpu_dstate);
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qht_insert(&tb_ctx.htable, tb, h, &existing_tb);
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/* remove TB from the page(s) if we couldn't insert it */
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if (unlikely(existing_tb)) {
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tb_page_remove(p, tb);
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if (p2) {
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tb_page_remove(p2, tb);
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}
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tb = existing_tb;
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}
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if (p2 && p2 != p) {
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page_unlock(p2);
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}
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page_unlock(p);
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return tb;
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}
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/*
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* @p must be non-NULL.
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* user-mode: call with mmap_lock held.
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* !user-mode: call with all @pages locked.
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*/
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static void
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tb_invalidate_phys_page_range__locked(struct page_collection *pages,
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PageDesc *p, tb_page_addr_t start,
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tb_page_addr_t end,
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uintptr_t retaddr)
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{
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TranslationBlock *tb;
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tb_page_addr_t tb_start, tb_end;
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int n;
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#ifdef TARGET_HAS_PRECISE_SMC
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CPUState *cpu = current_cpu;
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bool current_tb_not_found = retaddr != 0;
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bool current_tb_modified = false;
|
|
TranslationBlock *current_tb = NULL;
|
|
#endif /* TARGET_HAS_PRECISE_SMC */
|
|
|
|
assert_page_locked(p);
|
|
|
|
/*
|
|
* We remove all the TBs in the range [start, end[.
|
|
* XXX: see if in some cases it could be faster to invalidate all the code
|
|
*/
|
|
PAGE_FOR_EACH_TB(p, tb, n) {
|
|
assert_page_locked(p);
|
|
/* NOTE: this is subtle as a TB may span two physical pages */
|
|
if (n == 0) {
|
|
/* NOTE: tb_end may be after the end of the page, but
|
|
it is not a problem */
|
|
tb_start = tb->page_addr[0];
|
|
tb_end = tb_start + tb->size;
|
|
} else {
|
|
tb_start = tb->page_addr[1];
|
|
tb_end = tb_start + ((tb->page_addr[0] + tb->size)
|
|
& ~TARGET_PAGE_MASK);
|
|
}
|
|
if (!(tb_end <= start || tb_start >= end)) {
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
if (current_tb_not_found) {
|
|
current_tb_not_found = false;
|
|
/* now we have a real cpu fault */
|
|
current_tb = tcg_tb_lookup(retaddr);
|
|
}
|
|
if (current_tb == tb &&
|
|
(tb_cflags(current_tb) & CF_COUNT_MASK) != 1) {
|
|
/*
|
|
* If we are modifying the current TB, we must stop
|
|
* its execution. We could be more precise by checking
|
|
* that the modification is after the current PC, but it
|
|
* would require a specialized function to partially
|
|
* restore the CPU state.
|
|
*/
|
|
current_tb_modified = true;
|
|
cpu_restore_state_from_tb(cpu, current_tb, retaddr, true);
|
|
}
|
|
#endif /* TARGET_HAS_PRECISE_SMC */
|
|
tb_phys_invalidate__locked(tb);
|
|
}
|
|
}
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
/* if no code remaining, no need to continue to use slow writes */
|
|
if (!p->first_tb) {
|
|
tlb_unprotect_code(start);
|
|
}
|
|
#endif
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
if (current_tb_modified) {
|
|
page_collection_unlock(pages);
|
|
/* Force execution of one insn next time. */
|
|
cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu);
|
|
mmap_unlock();
|
|
cpu_loop_exit_noexc(cpu);
|
|
}
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Invalidate all TBs which intersect with the target physical address range
|
|
* [start;end[. NOTE: start and end must refer to the *same* physical page.
|
|
* 'is_cpu_write_access' should be true if called from a real cpu write
|
|
* access: the virtual CPU will exit the current TB if code is modified inside
|
|
* this TB.
|
|
*
|
|
* Called with mmap_lock held for user-mode emulation
|
|
*/
|
|
void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end)
|
|
{
|
|
struct page_collection *pages;
|
|
PageDesc *p;
|
|
|
|
assert_memory_lock();
|
|
|
|
p = page_find(start >> TARGET_PAGE_BITS);
|
|
if (p == NULL) {
|
|
return;
|
|
}
|
|
pages = page_collection_lock(start, end);
|
|
tb_invalidate_phys_page_range__locked(pages, p, start, end, 0);
|
|
page_collection_unlock(pages);
|
|
}
|
|
|
|
/*
|
|
* Invalidate all TBs which intersect with the target physical address range
|
|
* [start;end[. NOTE: start and end may refer to *different* physical pages.
|
|
* 'is_cpu_write_access' should be true if called from a real cpu write
|
|
* access: the virtual CPU will exit the current TB if code is modified inside
|
|
* this TB.
|
|
*
|
|
* Called with mmap_lock held for user-mode emulation.
|
|
*/
|
|
#ifdef CONFIG_SOFTMMU
|
|
void tb_invalidate_phys_range(ram_addr_t start, ram_addr_t end)
|
|
#else
|
|
void tb_invalidate_phys_range(target_ulong start, target_ulong end)
|
|
#endif
|
|
{
|
|
struct page_collection *pages;
|
|
tb_page_addr_t next;
|
|
|
|
assert_memory_lock();
|
|
|
|
pages = page_collection_lock(start, end);
|
|
for (next = (start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
|
|
start < end;
|
|
start = next, next += TARGET_PAGE_SIZE) {
|
|
PageDesc *pd = page_find(start >> TARGET_PAGE_BITS);
|
|
tb_page_addr_t bound = MIN(next, end);
|
|
|
|
if (pd == NULL) {
|
|
continue;
|
|
}
|
|
tb_invalidate_phys_page_range__locked(pages, pd, start, bound, 0);
|
|
}
|
|
page_collection_unlock(pages);
|
|
}
|
|
|
|
#ifdef CONFIG_SOFTMMU
|
|
/*
|
|
* len must be <= 8 and start must be a multiple of len.
|
|
* Called via softmmu_template.h when code areas are written to with
|
|
* iothread mutex not held.
|
|
*
|
|
* Call with all @pages in the range [@start, @start + len[ locked.
|
|
*/
|
|
void tb_invalidate_phys_page_fast(struct page_collection *pages,
|
|
tb_page_addr_t start, int len,
|
|
uintptr_t retaddr)
|
|
{
|
|
PageDesc *p;
|
|
|
|
assert_memory_lock();
|
|
|
|
p = page_find(start >> TARGET_PAGE_BITS);
|
|
if (!p) {
|
|
return;
|
|
}
|
|
|
|
assert_page_locked(p);
|
|
tb_invalidate_phys_page_range__locked(pages, p, start, start + len,
|
|
retaddr);
|
|
}
|
|
#else
|
|
/*
|
|
* Called with mmap_lock held. If pc is not 0 then it indicates the
|
|
* host PC of the faulting store instruction that caused this invalidate.
|
|
* Returns true if the caller needs to abort execution of the current
|
|
* TB (because it was modified by this store and the guest CPU has
|
|
* precise-SMC semantics).
|
|
*/
|
|
bool tb_invalidate_phys_page(tb_page_addr_t addr, uintptr_t pc)
|
|
{
|
|
TranslationBlock *tb;
|
|
PageDesc *p;
|
|
int n;
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
TranslationBlock *current_tb = NULL;
|
|
CPUState *cpu = current_cpu;
|
|
bool current_tb_modified = false;
|
|
#endif
|
|
|
|
assert_memory_lock();
|
|
|
|
addr &= TARGET_PAGE_MASK;
|
|
p = page_find(addr >> TARGET_PAGE_BITS);
|
|
if (!p) {
|
|
return false;
|
|
}
|
|
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
if (p->first_tb && pc != 0) {
|
|
current_tb = tcg_tb_lookup(pc);
|
|
}
|
|
#endif
|
|
assert_page_locked(p);
|
|
PAGE_FOR_EACH_TB(p, tb, n) {
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
if (current_tb == tb &&
|
|
(tb_cflags(current_tb) & CF_COUNT_MASK) != 1) {
|
|
/*
|
|
* If we are modifying the current TB, we must stop its execution.
|
|
* We could be more precise by checking that the modification is
|
|
* after the current PC, but it would require a specialized
|
|
* function to partially restore the CPU state.
|
|
*/
|
|
current_tb_modified = true;
|
|
cpu_restore_state_from_tb(cpu, current_tb, pc, true);
|
|
}
|
|
#endif /* TARGET_HAS_PRECISE_SMC */
|
|
tb_phys_invalidate(tb, addr);
|
|
}
|
|
p->first_tb = (uintptr_t)NULL;
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
if (current_tb_modified) {
|
|
/* Force execution of one insn next time. */
|
|
cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu);
|
|
return true;
|
|
}
|
|
#endif
|
|
|
|
return false;
|
|
}
|
|
#endif
|