qemu-e2k/hw/pci-bridge
Thomas Huth c68f81fec8 hw/pci-bridge/cxl_upstream: Fix problem with g_steal_pointer()
When setting GLIB_VERSION_MAX_ALLOWED to GLIB_VERSION_2_58 or higher,
glib adds type safety checks to the g_steal_pointer() macro. This
triggers errors in the build_cdat_table() function which uses the
g_steal_pointer() for type-casting from one pointer type to the other
(which also looks quite weird since the local pointers have all been
declared with g_autofree though they are never freed here). Let's fix
it by using a proper typecast instead. For making this possible, we
have to remove the QEMU_PACKED attribute from some structs since GCC
otherwise complains that the source and destination pointer might
have different alignment restrictions. Removing the QEMU_PACKED should
be fine here since the structs are already naturally aligned. Anyway,
add some QEMU_BUILD_BUG_ON() statements to make sure that we've got
the right sizes (without padding in the structs).

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-03-09 18:56:37 +03:00
..
cxl_downstream.c hw/cxl: Standardize all references on CXL r3.1 and minor updates 2024-02-14 06:09:33 -05:00
cxl_root_port.c hw/cxl: Standardize all references on CXL r3.1 and minor updates 2024-02-14 06:09:33 -05:00
cxl_upstream.c hw/pci-bridge/cxl_upstream: Fix problem with g_steal_pointer() 2024-03-09 18:56:37 +03:00
gen_pcie_root_port.c hw/pci-bridge: Constify VMState 2023-12-30 07:38:06 +11:00
i82801b11.c hw/pci-bridge: Constify VMState 2023-12-30 07:38:06 +11:00
ioh3420.c hw/pci-bridge: Constify VMState 2023-12-30 07:38:06 +11:00
Kconfig hw/pci-bridge: make building pcie-to-pci bridge configurable 2023-05-19 10:30:46 -04:00
meson.build meson: remove CONFIG_ALL 2023-12-31 09:11:28 +01:00
pci_bridge_dev.c hw/pci-bridge: Constify VMState 2023-12-30 07:38:06 +11:00
pci_expander_bridge_stubs.c pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup. 2022-06-09 19:32:49 -04:00
pci_expander_bridge.c hw/pci: spelling fixes 2023-09-20 07:54:34 +03:00
pcie_pci_bridge.c hw/pci-bridge: Constify VMState 2023-12-30 07:38:06 +11:00
pcie_root_port.c pci: drop redundant PCIDeviceClass::is_bridge field 2022-12-21 07:32:24 -05:00
simba.c pci: drop redundant PCIDeviceClass::is_bridge field 2022-12-21 07:32:24 -05:00
xio3130_downstream.c hw/pci-bridge: Constify VMState 2023-12-30 07:38:06 +11:00
xio3130_upstream.c hw/pci-bridge: Constify VMState 2023-12-30 07:38:06 +11:00