Wanpeng Li 4cfd7bab3f i386: Enable IA32_MISC_ENABLE MWAIT bit when exposing mwait/monitor ... The CPUID.01H:ECX[bit 3] ought to mirror the value of the MSR IA32_MISC_ENABLE MWAIT bit and as userspace has control of them both, it is userspace's job to configure both bits to match on the initial setup. Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Wanpeng Li <wanpengli@tencent.com> Message-Id: <1557813999-9175-1-git-send-email-wanpengli@tencent.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2019-06-03 14:03:01 +02:00
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alpha
arm	target/arm: correct return values for WRITE/READ in arm-semi	2019-05-28 10:28:51 +01:00
cris
hppa
i386	i386: Enable IA32_MISC_ENABLE MWAIT bit when exposing mwait/monitor	2019-06-03 14:03:01 +02:00
lm32	semihosting: move semihosting configuration into its own directory	2019-05-28 10:28:50 +01:00
m68k	semihosting: move semihosting configuration into its own directory	2019-05-28 10:28:50 +01:00
microblaze
mips	target/mips: Improve performance of certain MSA instructions	2019-06-01 20:20:20 +02:00
moxie
nios2	semihosting: move semihosting configuration into its own directory	2019-05-28 10:28:50 +01:00
openrisc
ppc	spapr/xive: add KVM support	2019-05-29 11:39:45 +10:00
riscv	target/riscv: Only flush TLB if SATP.ASID changes	2019-05-24 12:09:25 -07:00
s390x
sh4
sparc
tilegx
tricore
unicore32
xtensa	semihosting: move semihosting configuration into its own directory	2019-05-28 10:28:50 +01:00