602 lines
14 KiB
C
602 lines
14 KiB
C
/*
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* i386 execution defines
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "config.h"
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#include "dyngen-exec.h"
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/* XXX: factorize this mess */
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#ifdef TARGET_X86_64
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#define TARGET_LONG_BITS 64
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#else
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#define TARGET_LONG_BITS 32
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#endif
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#include "cpu-defs.h"
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/* at least 4 register variables are defined */
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register struct CPUX86State *env asm(AREG0);
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#if TARGET_LONG_BITS > HOST_LONG_BITS
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/* no registers can be used */
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#define T0 (env->t0)
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#define T1 (env->t1)
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#define T2 (env->t2)
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#else
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/* XXX: use unsigned long instead of target_ulong - better code will
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be generated for 64 bit CPUs */
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register target_ulong T0 asm(AREG1);
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register target_ulong T1 asm(AREG2);
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register target_ulong T2 asm(AREG3);
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/* if more registers are available, we define some registers too */
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#ifdef AREG4
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register target_ulong EAX asm(AREG4);
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#define reg_EAX
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#endif
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#ifdef AREG5
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register target_ulong ESP asm(AREG5);
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#define reg_ESP
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#endif
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#ifdef AREG6
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register target_ulong EBP asm(AREG6);
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#define reg_EBP
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#endif
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#ifdef AREG7
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register target_ulong ECX asm(AREG7);
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#define reg_ECX
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#endif
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#ifdef AREG8
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register target_ulong EDX asm(AREG8);
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#define reg_EDX
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#endif
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#ifdef AREG9
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register target_ulong EBX asm(AREG9);
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#define reg_EBX
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#endif
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#ifdef AREG10
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register target_ulong ESI asm(AREG10);
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#define reg_ESI
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#endif
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#ifdef AREG11
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register target_ulong EDI asm(AREG11);
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#define reg_EDI
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#endif
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#endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
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#define A0 T2
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extern FILE *logfile;
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extern int loglevel;
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#ifndef reg_EAX
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#define EAX (env->regs[R_EAX])
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#endif
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#ifndef reg_ECX
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#define ECX (env->regs[R_ECX])
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#endif
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#ifndef reg_EDX
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#define EDX (env->regs[R_EDX])
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#endif
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#ifndef reg_EBX
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#define EBX (env->regs[R_EBX])
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#endif
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#ifndef reg_ESP
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#define ESP (env->regs[R_ESP])
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#endif
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#ifndef reg_EBP
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#define EBP (env->regs[R_EBP])
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#endif
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#ifndef reg_ESI
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#define ESI (env->regs[R_ESI])
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#endif
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#ifndef reg_EDI
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#define EDI (env->regs[R_EDI])
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#endif
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#define EIP (env->eip)
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#define DF (env->df)
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#define CC_SRC (env->cc_src)
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#define CC_DST (env->cc_dst)
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#define CC_OP (env->cc_op)
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/* float macros */
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#define FT0 (env->ft0)
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#define ST0 (env->fpregs[env->fpstt].d)
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#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
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#define ST1 ST(1)
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#ifdef USE_FP_CONVERT
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#define FP_CONVERT (env->fp_convert)
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#endif
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#include "cpu.h"
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#include "exec-all.h"
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typedef struct CCTable {
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int (*compute_all)(void); /* return all the flags */
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int (*compute_c)(void); /* return the C flag */
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} CCTable;
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extern CCTable cc_table[];
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void load_seg(int seg_reg, int selector);
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void helper_ljmp_protected_T0_T1(int next_eip);
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void helper_lcall_real_T0_T1(int shift, int next_eip);
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void helper_lcall_protected_T0_T1(int shift, int next_eip);
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void helper_iret_real(int shift);
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void helper_iret_protected(int shift, int next_eip);
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void helper_lret_protected(int shift, int addend);
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void helper_lldt_T0(void);
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void helper_ltr_T0(void);
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void helper_movl_crN_T0(int reg);
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void helper_movl_drN_T0(int reg);
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void helper_invlpg(target_ulong addr);
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void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
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void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
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void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
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void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr);
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int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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int is_write, int mmu_idx, int is_softmmu);
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void tlb_fill(target_ulong addr, int is_write, int mmu_idx,
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void *retaddr);
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void __hidden cpu_lock(void);
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void __hidden cpu_unlock(void);
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void do_interrupt(int intno, int is_int, int error_code,
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target_ulong next_eip, int is_hw);
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void do_interrupt_user(int intno, int is_int, int error_code,
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target_ulong next_eip);
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void raise_interrupt(int intno, int is_int, int error_code,
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int next_eip_addend);
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void raise_exception_err(int exception_index, int error_code);
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void raise_exception(int exception_index);
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void do_smm_enter(void);
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void __hidden cpu_loop_exit(void);
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void OPPROTO op_movl_eflags_T0(void);
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void OPPROTO op_movl_T0_eflags(void);
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void helper_divl_EAX_T0(void);
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void helper_idivl_EAX_T0(void);
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void helper_mulq_EAX_T0(void);
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void helper_imulq_EAX_T0(void);
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void helper_imulq_T0_T1(void);
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void helper_divq_EAX_T0(void);
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void helper_idivq_EAX_T0(void);
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void helper_bswapq_T0(void);
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void helper_cmpxchg8b(void);
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void helper_single_step(void);
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void helper_cpuid(void);
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void helper_enter_level(int level, int data32);
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void helper_enter64_level(int level, int data64);
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void helper_sysenter(void);
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void helper_sysexit(void);
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void helper_syscall(int next_eip_addend);
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void helper_sysret(int dflag);
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void helper_rdtsc(void);
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void helper_rdmsr(void);
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void helper_wrmsr(void);
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void helper_lsl(void);
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void helper_lar(void);
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void helper_verr(void);
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void helper_verw(void);
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void helper_rsm(void);
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void check_iob_T0(void);
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void check_iow_T0(void);
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void check_iol_T0(void);
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void check_iob_DX(void);
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void check_iow_DX(void);
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void check_iol_DX(void);
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#if !defined(CONFIG_USER_ONLY)
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#include "softmmu_exec.h"
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static inline double ldfq(target_ulong ptr)
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{
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union {
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double d;
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uint64_t i;
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} u;
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u.i = ldq(ptr);
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return u.d;
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}
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static inline void stfq(target_ulong ptr, double v)
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{
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union {
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double d;
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uint64_t i;
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} u;
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u.d = v;
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stq(ptr, u.i);
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}
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static inline float ldfl(target_ulong ptr)
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{
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union {
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float f;
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uint32_t i;
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} u;
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u.i = ldl(ptr);
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return u.f;
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}
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static inline void stfl(target_ulong ptr, float v)
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{
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union {
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float f;
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uint32_t i;
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} u;
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u.f = v;
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stl(ptr, u.i);
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}
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#endif /* !defined(CONFIG_USER_ONLY) */
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#ifdef USE_X86LDOUBLE
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/* use long double functions */
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#define floatx_to_int32 floatx80_to_int32
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#define floatx_to_int64 floatx80_to_int64
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#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
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#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
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#define floatx_abs floatx80_abs
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#define floatx_chs floatx80_chs
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#define floatx_round_to_int floatx80_round_to_int
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#define floatx_compare floatx80_compare
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#define floatx_compare_quiet floatx80_compare_quiet
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#define sin sinl
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#define cos cosl
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#define sqrt sqrtl
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#define pow powl
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#define log logl
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#define tan tanl
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#define atan2 atan2l
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#define floor floorl
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#define ceil ceill
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#define ldexp ldexpl
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#else
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#define floatx_to_int32 float64_to_int32
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#define floatx_to_int64 float64_to_int64
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#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
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#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
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#define floatx_abs float64_abs
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#define floatx_chs float64_chs
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#define floatx_round_to_int float64_round_to_int
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#define floatx_compare float64_compare
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#define floatx_compare_quiet float64_compare_quiet
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#endif
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extern CPU86_LDouble sin(CPU86_LDouble x);
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extern CPU86_LDouble cos(CPU86_LDouble x);
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extern CPU86_LDouble sqrt(CPU86_LDouble x);
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extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
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extern CPU86_LDouble log(CPU86_LDouble x);
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extern CPU86_LDouble tan(CPU86_LDouble x);
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extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
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extern CPU86_LDouble floor(CPU86_LDouble x);
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extern CPU86_LDouble ceil(CPU86_LDouble x);
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#define RC_MASK 0xc00
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#define RC_NEAR 0x000
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#define RC_DOWN 0x400
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#define RC_UP 0x800
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#define RC_CHOP 0xc00
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#define MAXTAN 9223372036854775808.0
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#ifdef USE_X86LDOUBLE
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/* only for x86 */
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typedef union {
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long double d;
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struct {
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unsigned long long lower;
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unsigned short upper;
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} l;
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} CPU86_LDoubleU;
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/* the following deal with x86 long double-precision numbers */
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#define MAXEXPD 0x7fff
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#define EXPBIAS 16383
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#define EXPD(fp) (fp.l.upper & 0x7fff)
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#define SIGND(fp) ((fp.l.upper) & 0x8000)
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#define MANTD(fp) (fp.l.lower)
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#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
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#else
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/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
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typedef union {
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double d;
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#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
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struct {
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uint32_t lower;
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int32_t upper;
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} l;
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#else
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struct {
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int32_t upper;
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uint32_t lower;
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} l;
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#endif
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#ifndef __arm__
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int64_t ll;
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#endif
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} CPU86_LDoubleU;
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/* the following deal with IEEE double-precision numbers */
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#define MAXEXPD 0x7ff
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#define EXPBIAS 1023
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#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
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#define SIGND(fp) ((fp.l.upper) & 0x80000000)
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#ifdef __arm__
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#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
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#else
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#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
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#endif
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#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
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#endif
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static inline void fpush(void)
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{
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env->fpstt = (env->fpstt - 1) & 7;
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env->fptags[env->fpstt] = 0; /* validate stack entry */
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}
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static inline void fpop(void)
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{
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env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
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env->fpstt = (env->fpstt + 1) & 7;
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}
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#ifndef USE_X86LDOUBLE
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static inline CPU86_LDouble helper_fldt(target_ulong ptr)
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{
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CPU86_LDoubleU temp;
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int upper, e;
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uint64_t ll;
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/* mantissa */
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upper = lduw(ptr + 8);
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/* XXX: handle overflow ? */
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e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
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e |= (upper >> 4) & 0x800; /* sign */
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ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
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#ifdef __arm__
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temp.l.upper = (e << 20) | (ll >> 32);
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temp.l.lower = ll;
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#else
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temp.ll = ll | ((uint64_t)e << 52);
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#endif
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return temp.d;
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}
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static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
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{
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CPU86_LDoubleU temp;
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int e;
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temp.d = f;
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/* mantissa */
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stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
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/* exponent + sign */
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e = EXPD(temp) - EXPBIAS + 16383;
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e |= SIGND(temp) >> 16;
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stw(ptr + 8, e);
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}
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#else
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/* XXX: same endianness assumed */
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#ifdef CONFIG_USER_ONLY
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static inline CPU86_LDouble helper_fldt(target_ulong ptr)
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{
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return *(CPU86_LDouble *)ptr;
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}
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static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
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{
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*(CPU86_LDouble *)ptr = f;
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}
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#else
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/* we use memory access macros */
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static inline CPU86_LDouble helper_fldt(target_ulong ptr)
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{
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CPU86_LDoubleU temp;
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temp.l.lower = ldq(ptr);
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temp.l.upper = lduw(ptr + 8);
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return temp.d;
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}
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static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
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{
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CPU86_LDoubleU temp;
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temp.d = f;
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stq(ptr, temp.l.lower);
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stw(ptr + 8, temp.l.upper);
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}
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#endif /* !CONFIG_USER_ONLY */
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#endif /* USE_X86LDOUBLE */
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#define FPUS_IE (1 << 0)
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#define FPUS_DE (1 << 1)
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#define FPUS_ZE (1 << 2)
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#define FPUS_OE (1 << 3)
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#define FPUS_UE (1 << 4)
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#define FPUS_PE (1 << 5)
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#define FPUS_SF (1 << 6)
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#define FPUS_SE (1 << 7)
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#define FPUS_B (1 << 15)
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#define FPUC_EM 0x3f
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extern const CPU86_LDouble f15rk[7];
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void helper_fldt_ST0_A0(void);
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void helper_fstt_ST0_A0(void);
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void fpu_raise_exception(void);
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CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
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void helper_fbld_ST0_A0(void);
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void helper_fbst_ST0_A0(void);
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void helper_f2xm1(void);
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void helper_fyl2x(void);
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void helper_fptan(void);
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void helper_fpatan(void);
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void helper_fxtract(void);
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void helper_fprem1(void);
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void helper_fprem(void);
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void helper_fyl2xp1(void);
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void helper_fsqrt(void);
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void helper_fsincos(void);
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void helper_frndint(void);
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void helper_fscale(void);
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void helper_fsin(void);
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void helper_fcos(void);
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void helper_fxam_ST0(void);
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void helper_fstenv(target_ulong ptr, int data32);
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void helper_fldenv(target_ulong ptr, int data32);
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void helper_fsave(target_ulong ptr, int data32);
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void helper_frstor(target_ulong ptr, int data32);
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void helper_fxsave(target_ulong ptr, int data64);
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void helper_fxrstor(target_ulong ptr, int data64);
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void restore_native_fp_state(CPUState *env);
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void save_native_fp_state(CPUState *env);
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float approx_rsqrt(float a);
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float approx_rcp(float a);
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void update_fp_status(void);
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void helper_hlt(void);
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void helper_monitor(void);
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void helper_mwait(void);
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void helper_vmrun(target_ulong addr);
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void helper_vmmcall(void);
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void helper_vmload(target_ulong addr);
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void helper_vmsave(target_ulong addr);
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void helper_stgi(void);
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void helper_clgi(void);
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void helper_skinit(void);
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void helper_invlpga(void);
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void vmexit(uint64_t exit_code, uint64_t exit_info_1);
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extern const uint8_t parity_table[256];
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extern const uint8_t rclw_table[32];
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extern const uint8_t rclb_table[32];
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static inline uint32_t compute_eflags(void)
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{
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return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
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}
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|
|
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/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
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static inline void load_eflags(int eflags, int update_mask)
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{
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CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
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DF = 1 - (2 * ((eflags >> 10) & 1));
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env->eflags = (env->eflags & ~update_mask) |
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(eflags & update_mask);
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}
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|
|
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static inline void env_to_regs(void)
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|
{
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#ifdef reg_EAX
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EAX = env->regs[R_EAX];
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#endif
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|
#ifdef reg_ECX
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ECX = env->regs[R_ECX];
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#endif
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#ifdef reg_EDX
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|
EDX = env->regs[R_EDX];
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#endif
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|
#ifdef reg_EBX
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|
EBX = env->regs[R_EBX];
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|
#endif
|
|
#ifdef reg_ESP
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|
ESP = env->regs[R_ESP];
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|
#endif
|
|
#ifdef reg_EBP
|
|
EBP = env->regs[R_EBP];
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|
#endif
|
|
#ifdef reg_ESI
|
|
ESI = env->regs[R_ESI];
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|
#endif
|
|
#ifdef reg_EDI
|
|
EDI = env->regs[R_EDI];
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|
#endif
|
|
}
|
|
|
|
static inline void regs_to_env(void)
|
|
{
|
|
#ifdef reg_EAX
|
|
env->regs[R_EAX] = EAX;
|
|
#endif
|
|
#ifdef reg_ECX
|
|
env->regs[R_ECX] = ECX;
|
|
#endif
|
|
#ifdef reg_EDX
|
|
env->regs[R_EDX] = EDX;
|
|
#endif
|
|
#ifdef reg_EBX
|
|
env->regs[R_EBX] = EBX;
|
|
#endif
|
|
#ifdef reg_ESP
|
|
env->regs[R_ESP] = ESP;
|
|
#endif
|
|
#ifdef reg_EBP
|
|
env->regs[R_EBP] = EBP;
|
|
#endif
|
|
#ifdef reg_ESI
|
|
env->regs[R_ESI] = ESI;
|
|
#endif
|
|
#ifdef reg_EDI
|
|
env->regs[R_EDI] = EDI;
|
|
#endif
|
|
}
|
|
|
|
static inline int cpu_halted(CPUState *env) {
|
|
/* handle exit of HALTED state */
|
|
if (!(env->hflags & HF_HALTED_MASK))
|
|
return 0;
|
|
/* disable halt condition */
|
|
if ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
|
|
(env->eflags & IF_MASK)) {
|
|
env->hflags &= ~HF_HALTED_MASK;
|
|
return 0;
|
|
}
|
|
return EXCP_HALTED;
|
|
}
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|
|