qemu-e2k/hw/riscv
Bin Meng 90742c5496 hw/riscv: microchip_pfsoc: Hook the I2C1 controller
The latest SD card image [1] released by Microchip ships a Linux
kernel with built-in PolarFire SoC I2C driver support. The device
tree file includes the description for the I2C1 node hence kernel
tries to probe the I2C1 device during boot.

It is enough to create an unimplemented device for I2C1 to allow
the kernel to continue booting to the shell.

[1] ftp://ftpsoc.microsemi.com/outgoing/core-image-minimal-dev-icicle-kit-es-sd-20201009141623.rootfs.wic.gz

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1603863010-15807-11-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03 07:17:23 -08:00
..
boot.c hw/riscv: Load the kernel after the firmware 2020-10-22 12:00:22 -07:00
Kconfig hw/riscv: microchip_pfsoc: Connect the SYSREG module 2020-11-03 07:17:23 -08:00
meson.build
microchip_pfsoc.c hw/riscv: microchip_pfsoc: Hook the I2C1 controller 2020-11-03 07:17:23 -08:00
numa.c
opentitan.c hw/riscv: Load the kernel after the firmware 2020-10-22 12:00:22 -07:00
riscv_hart.c
sifive_e.c hw/riscv: Load the kernel after the firmware 2020-10-22 12:00:22 -07:00
sifive_u.c hw/riscv: sifive_u: Allow passing custom DTB 2020-11-03 07:17:23 -08:00
spike.c hw/riscv: Load the kernel after the firmware 2020-10-22 12:00:22 -07:00
virt.c hw/riscv: virt: Allow passing custom DTB 2020-11-03 07:17:23 -08:00