7a261bafc8
Add support for emulating Shakti reference platform based on C-class running on arty-100T board. https://gitlab.com/shaktiproject/cores/shakti-soc/-/blob/master/README.rst Signed-off-by: Vijai Kumar K <vijai@behindbytes.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210401181457.73039-3-vijai@behindbytes.com [Changes by AF: - Check for mstate->firmware before loading it ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
14 lines
644 B
Meson
14 lines
644 B
Meson
riscv_ss = ss.source_set()
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riscv_ss.add(files('boot.c'), fdt)
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riscv_ss.add(files('numa.c'))
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riscv_ss.add(files('riscv_hart.c'))
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riscv_ss.add(when: 'CONFIG_OPENTITAN', if_true: files('opentitan.c'))
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riscv_ss.add(when: 'CONFIG_RISCV_VIRT', if_true: files('virt.c'))
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riscv_ss.add(when: 'CONFIG_SHAKTI_C', if_true: files('shakti_c.c'))
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riscv_ss.add(when: 'CONFIG_SIFIVE_E', if_true: files('sifive_e.c'))
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riscv_ss.add(when: 'CONFIG_SIFIVE_U', if_true: files('sifive_u.c'))
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riscv_ss.add(when: 'CONFIG_SPIKE', if_true: files('spike.c'))
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riscv_ss.add(when: 'CONFIG_MICROCHIP_PFSOC', if_true: files('microchip_pfsoc.c'))
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hw_arch += {'riscv': riscv_ss}
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