Paolo Bonzini 1110bfe6f5 target/i386: simplify handling of conforming code segments on interrupt ... Move the handling of conforming code segments before the handling of stack switch. Because dpl == cpl after the new "if", it's now unnecessary to check the C bit when testing dpl < cpl. Furthermore, dpl > cpl is checked slightly above the modified code, so the final "else" is unreachable and we can remove it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2017-07-04 14:30:03 +02:00
..
alpha	target/alpha: Use tcg_gen_lookup_and_goto_ptr	2017-06-19 11:11:25 -07:00
arm	target/arm: Exit after clearing aarch64 interrupt mask	2017-06-19 11:11:26 -07:00
cris	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
hppa	target/hppa: Use tcg_gen_lookup_and_goto_ptr	2017-06-05 09:25:42 -07:00
i386	target/i386: simplify handling of conforming code segments on interrupt	2017-07-04 14:30:03 +02:00
lm32	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
m68k	target/m68k: add fmovem	2017-06-29 20:29:57 +02:00
microblaze	cputlb: drop flush_global flag from tlb_flush	2017-01-13 14:24:37 +00:00
mips	vcpu_dirty: share the same field in CPUState for all accelerators	2017-07-04 14:30:03 +02:00
moxie	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
nios2	target/nios2: Fix 64-bit ilp32 compilation	2017-06-05 09:25:42 -07:00
openrisc	target/openrisc: Support non-busy idle state using PMR SPR	2017-05-04 09:39:14 +09:00
ppc	target/ppc: Proper cleanup when ppc_cpu_realizefn fails	2017-06-30 14:03:31 +10:00
s390x	target/s390x: Implement idte instruction	2017-06-23 09:17:45 -07:00
sh4	target/sh4: fix RTE instruction delay slot	2017-05-30 21:00:56 +02:00
sparc	shutdown: Add source information to SHUTDOWN and RESET	2017-05-23 13:28:17 +02:00
tilegx	migration: Remove unneeded includes of migration/vmstate.h	2017-06-01 18:49:22 +02:00
tricore	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
unicore32	cputlb: drop flush_global flag from tlb_flush	2017-01-13 14:24:37 +00:00
xtensa	target/xtensa: handle unknown registers in gdbstub	2017-06-06 02:40:48 -07:00