Leon Alrae 701074a6fc target-mips: fix EntryHi.EHINV being cleared on TLB exception ...

While implementing TLB invalidation feature we forgot to modify
part of code responsible for updating EntryHi during TLB exception.
Consequently EntryHi.EHINV is unexpectedly cleared on the exception.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>

2016-07-28 11:24:02 +01:00

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cpu-qom.h

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cpu.c

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cpu.h

target-*: Clean up cpu.h header guards

2016-07-12 16:19:16 +02:00

dsp_helper.c

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gdbstub.c

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helper.c

target-mips: fix EntryHi.EHINV being cleared on TLB exception

2016-07-28 11:24:02 +01:00

helper.h

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kvm_mips.h

Clean up ill-advised or unusual header guards

2016-07-12 16:20:46 +02:00

kvm.c

kvm-irqchip: i386: add hook for add/remove virq

2016-07-21 20:44:19 +03:00

lmi_helper.c

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machine.c

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Makefile.objs

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mips-defs.h

Clean up ill-advised or unusual header guards

2016-07-12 16:20:46 +02:00

mips-semi.c

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msa_helper.c

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op_helper.c

Fix confusing argument names in some common functions

2016-07-12 13:06:08 +01:00

TODO

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translate_init.c

target-mips: enable 10-bit ASIDs in I6400 CPU

2016-07-12 09:10:21 +01:00

translate.c

target-mips: support CP0.Config4.AE bit

2016-07-12 09:10:20 +01:00