qemu-e2k/util
Richard Henderson 7efd65423a Second RISC-V PR for 8.1
* Skip Vector set tail when vta is zero
 * Move zc* out of the experimental properties
 * Mask the implicitly enabled extensions in isa_string based on priv version
 * Rework CPU extension validation and validate MISA changes
 * Fixup PMP TLB cacheing errors
 * Writing to pmpaddr and MML/MMWP correctly triggers TLB flushes
 * Fixup PMP bypass checks
 * Deny access if access is partially inside a PMP entry
 * Correct OpenTitanState parent type/size
 * Fix QEMU crash when NUMA nodes exceed available CPUs
 * Fix pointer mask transformation for vector address
 * Updates and improvements for Smstateen
 * Support disas for Zcm* extensions
 * Support disas for Z*inx extensions
 * Remove unused decomp_rv32/64 value for vector instructions
 * Enable PC-relative translation
 * Assume M-mode FW in pflash0 only when "-bios none"
 * Support using pflash via -blockdev option
 * Add vector registers to log
 * Clean up reference of Vector MTYPE
 * Remove the check for extra Vector tail elements
 * Smepmp: Return error when access permission not allowed in PMP
 * Fixes for smsiaddrcfg and smsiaddrcfgh in AIA
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Merge tag 'pull-riscv-to-apply-20230614' of https://github.com/alistair23/qemu into staging

Second RISC-V PR for 8.1

* Skip Vector set tail when vta is zero
* Move zc* out of the experimental properties
* Mask the implicitly enabled extensions in isa_string based on priv version
* Rework CPU extension validation and validate MISA changes
* Fixup PMP TLB cacheing errors
* Writing to pmpaddr and MML/MMWP correctly triggers TLB flushes
* Fixup PMP bypass checks
* Deny access if access is partially inside a PMP entry
* Correct OpenTitanState parent type/size
* Fix QEMU crash when NUMA nodes exceed available CPUs
* Fix pointer mask transformation for vector address
* Updates and improvements for Smstateen
* Support disas for Zcm* extensions
* Support disas for Z*inx extensions
* Remove unused decomp_rv32/64 value for vector instructions
* Enable PC-relative translation
* Assume M-mode FW in pflash0 only when "-bios none"
* Support using pflash via -blockdev option
* Add vector registers to log
* Clean up reference of Vector MTYPE
* Remove the check for extra Vector tail elements
* Smepmp: Return error when access permission not allowed in PMP
* Fixes for smsiaddrcfg and smsiaddrcfgh in AIA

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# gpg: Signature made Wed 14 Jun 2023 03:17:14 AM CEST
# gpg:                using RSA key 6AE902B6A7CA877D6D659296AF7C95130C538013
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6AE9 02B6 A7CA 877D 6D65  9296 AF7C 9513 0C53 8013

* tag 'pull-riscv-to-apply-20230614' of https://github.com/alistair23/qemu: (60 commits)
  hw/intc: If mmsiaddrcfgh.L == 1, smsiaddrcfg and smsiaddrcfgh are read-only.
  target/riscv: Smepmp: Return error when access permission not allowed in PMP
  target/riscv/vector_helper.c: Remove the check for extra tail elements
  target/riscv/vector_helper.c: clean up reference of MTYPE
  target/riscv: Fix initialized value for cur_pmmask
  util/log: Add vector registers to log
  docs/system: riscv: Add pflash usage details
  riscv/virt: Support using pflash via -blockdev option
  hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none"
  target/riscv: Remove pc_succ_insn from DisasContext
  target/riscv: Enable PC-relative translation
  target/riscv: Use true diff for gen_pc_plus_diff
  target/riscv: Change gen_set_pc_imm to gen_update_pc
  target/riscv: Change gen_goto_tb to work on displacements
  target/riscv: Introduce cur_insn_len into DisasContext
  target/riscv: Fix target address to update badaddr
  disas/riscv.c: Remove redundant parentheses
  disas/riscv.c: Fix lines with over 80 characters
  disas/riscv.c: Remove unused decomp_rv32/64 value for vector instructions
  disas/riscv.c: Support disas for Z*inx extensions
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-06-14 05:28:51 +02:00
..
aio-posix.c
aio-posix.h
aio-wait.c
aio-win32.c
aiocb.c
async-teardown.c
async.c
atomic64.c
base64.c
bitmap.c
bitops.c
block-helpers.c
block-helpers.h
buffer.c
bufferiszero.c
cacheflush.c util/cacheflush: Avoid possible redundant dcache flush on Darwin 2023-06-13 11:28:58 +02:00
compatfd.c
coroutine-sigaltstack.c
coroutine-ucontext.c
coroutine-windows.c
cpuinfo-aarch64.c
cpuinfo-i386.c
crc32c.c
crc-ccitt.c
cutils.c
dbus.c
drm.c
envlist.c
error-report.c
error.c
event_notifier-posix.c
event_notifier-win32.c
fdmon-epoll.c
fdmon-io_uring.c
fdmon-poll.c
fifo8.c
filemonitor-inotify.c
filemonitor-stub.c
getauxval.c
guest-random.c
hbitmap.c
hexdump.c
host-utils.c
id.c
int128.c
interval-tree.c
iov.c
iova-tree.c
keyval.c
lockcnt.c
log.c
main-loop.c
memalign.c
memfd.c
meson.build
mmap-alloc.c
module.c
notify.c
nvdimm-utils.c
osdep.c
oslib-posix.c
oslib-win32.c
path.c
qdist.c
qemu-co-shared-resource.c
qemu-co-timeout.c
qemu-config.c
qemu-coroutine-io.c
qemu-coroutine-lock.c
qemu-coroutine-sleep.c
qemu-coroutine.c
qemu-option.c
qemu-print.c
qemu-progress.c
qemu-sockets.c
qemu-thread-common.h
qemu-thread-posix.c
qemu-thread-win32.c
qemu-timer-common.c
qemu-timer.c
qht.c
qsp.c
qtree.c
range.c
rcu.c
readline.c
selfmap.c
stats64.c
sys_membarrier.c
systemd.c
thread-context.c
thread-pool.c
throttle.c
timed-average.c
trace-events
trace.h
transactions.c
unicode.c
uri.c
userfaultfd.c
uuid.c
vfio-helpers.c
vhost-user-server.c
yank.c