576 lines
20 KiB
C
576 lines
20 KiB
C
#include "qemu/osdep.h"
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#include "hw/boards.h"
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#include "hw/acpi/cpu.h"
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#include "qapi/error.h"
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#include "qapi/qapi-events-misc.h"
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#include "trace.h"
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#include "sysemu/numa.h"
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#define ACPI_CPU_HOTPLUG_REG_LEN 12
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#define ACPI_CPU_SELECTOR_OFFSET_WR 0
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#define ACPI_CPU_FLAGS_OFFSET_RW 4
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#define ACPI_CPU_CMD_OFFSET_WR 5
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#define ACPI_CPU_CMD_DATA_OFFSET_RW 8
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enum {
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CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0,
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CPHP_OST_EVENT_CMD = 1,
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CPHP_OST_STATUS_CMD = 2,
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CPHP_CMD_MAX
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};
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static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev)
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{
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ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1);
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info->slot_type = ACPI_SLOT_TYPE_CPU;
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info->slot = g_strdup_printf("%d", idx);
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info->source = cdev->ost_event;
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info->status = cdev->ost_status;
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if (cdev->cpu) {
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DeviceState *dev = DEVICE(cdev->cpu);
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if (dev->id) {
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info->device = g_strdup(dev->id);
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info->has_device = true;
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}
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}
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return info;
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}
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void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list)
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{
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int i;
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for (i = 0; i < cpu_st->dev_count; i++) {
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ACPIOSTInfoList *elem = g_new0(ACPIOSTInfoList, 1);
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elem->value = acpi_cpu_device_status(i, &cpu_st->devs[i]);
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elem->next = NULL;
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**list = elem;
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*list = &elem->next;
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}
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}
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static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
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{
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uint64_t val = 0;
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CPUHotplugState *cpu_st = opaque;
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AcpiCpuStatus *cdev;
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if (cpu_st->selector >= cpu_st->dev_count) {
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return val;
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}
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cdev = &cpu_st->devs[cpu_st->selector];
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switch (addr) {
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case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */
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val |= cdev->cpu ? 1 : 0;
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val |= cdev->is_inserting ? 2 : 0;
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val |= cdev->is_removing ? 4 : 0;
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trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
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break;
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case ACPI_CPU_CMD_DATA_OFFSET_RW:
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switch (cpu_st->command) {
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case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
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val = cpu_st->selector;
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break;
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default:
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break;
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}
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trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val);
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break;
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default:
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break;
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}
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return val;
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}
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static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
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unsigned int size)
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{
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CPUHotplugState *cpu_st = opaque;
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AcpiCpuStatus *cdev;
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ACPIOSTInfo *info;
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assert(cpu_st->dev_count);
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if (addr) {
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if (cpu_st->selector >= cpu_st->dev_count) {
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trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector);
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return;
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}
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}
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switch (addr) {
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case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */
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cpu_st->selector = data;
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trace_cpuhp_acpi_write_idx(cpu_st->selector);
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break;
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case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */
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cdev = &cpu_st->devs[cpu_st->selector];
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if (data & 2) { /* clear insert event */
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cdev->is_inserting = false;
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trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector);
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} else if (data & 4) { /* clear remove event */
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cdev->is_removing = false;
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trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector);
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} else if (data & 8) {
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DeviceState *dev = NULL;
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HotplugHandler *hotplug_ctrl = NULL;
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if (!cdev->cpu) {
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trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector);
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break;
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}
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trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector);
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dev = DEVICE(cdev->cpu);
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hotplug_ctrl = qdev_get_hotplug_handler(dev);
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hotplug_handler_unplug(hotplug_ctrl, dev, NULL);
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}
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break;
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case ACPI_CPU_CMD_OFFSET_WR:
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trace_cpuhp_acpi_write_cmd(cpu_st->selector, data);
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if (data < CPHP_CMD_MAX) {
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cpu_st->command = data;
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if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) {
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uint32_t iter = cpu_st->selector;
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do {
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cdev = &cpu_st->devs[iter];
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if (cdev->is_inserting || cdev->is_removing) {
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cpu_st->selector = iter;
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trace_cpuhp_acpi_cpu_has_events(cpu_st->selector,
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cdev->is_inserting, cdev->is_removing);
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break;
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}
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iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0;
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} while (iter != cpu_st->selector);
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}
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}
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break;
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case ACPI_CPU_CMD_DATA_OFFSET_RW:
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switch (cpu_st->command) {
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case CPHP_OST_EVENT_CMD: {
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cdev = &cpu_st->devs[cpu_st->selector];
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cdev->ost_event = data;
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trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event);
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break;
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}
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case CPHP_OST_STATUS_CMD: {
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cdev = &cpu_st->devs[cpu_st->selector];
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cdev->ost_status = data;
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info = acpi_cpu_device_status(cpu_st->selector, cdev);
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qapi_event_send_acpi_device_ost(info, &error_abort);
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qapi_free_ACPIOSTInfo(info);
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trace_cpuhp_acpi_write_ost_status(cpu_st->selector,
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cdev->ost_status);
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break;
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}
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default:
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break;
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}
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break;
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default:
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break;
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}
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}
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static const MemoryRegionOps cpu_hotplug_ops = {
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.read = cpu_hotplug_rd,
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.write = cpu_hotplug_wr,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 4,
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},
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};
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void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
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CPUHotplugState *state, hwaddr base_addr)
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{
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MachineState *machine = MACHINE(qdev_get_machine());
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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const CPUArchIdList *id_list;
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int i;
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assert(mc->possible_cpu_arch_ids);
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id_list = mc->possible_cpu_arch_ids(machine);
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state->dev_count = id_list->len;
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state->devs = g_new0(typeof(*state->devs), state->dev_count);
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for (i = 0; i < id_list->len; i++) {
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state->devs[i].cpu = CPU(id_list->cpus[i].cpu);
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state->devs[i].arch_id = id_list->cpus[i].arch_id;
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}
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memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state,
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"acpi-mem-hotplug", ACPI_CPU_HOTPLUG_REG_LEN);
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memory_region_add_subregion(as, base_addr, &state->ctrl_reg);
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}
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static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev)
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{
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CPUClass *k = CPU_GET_CLASS(dev);
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uint64_t cpu_arch_id = k->get_arch_id(CPU(dev));
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int i;
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for (i = 0; i < cpu_st->dev_count; i++) {
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if (cpu_arch_id == cpu_st->devs[i].arch_id) {
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return &cpu_st->devs[i];
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}
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}
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return NULL;
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}
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void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
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CPUHotplugState *cpu_st, DeviceState *dev, Error **errp)
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{
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AcpiCpuStatus *cdev;
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cdev = get_cpu_status(cpu_st, dev);
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if (!cdev) {
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return;
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}
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cdev->cpu = CPU(dev);
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if (dev->hotplugged) {
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cdev->is_inserting = true;
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acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
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}
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}
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void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
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CPUHotplugState *cpu_st,
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DeviceState *dev, Error **errp)
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{
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AcpiCpuStatus *cdev;
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cdev = get_cpu_status(cpu_st, dev);
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if (!cdev) {
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return;
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}
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cdev->is_removing = true;
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acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
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}
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void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st,
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DeviceState *dev, Error **errp)
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{
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AcpiCpuStatus *cdev;
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cdev = get_cpu_status(cpu_st, dev);
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if (!cdev) {
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return;
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}
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cdev->cpu = NULL;
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}
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static const VMStateDescription vmstate_cpuhp_sts = {
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.name = "CPU hotplug device state",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField[]) {
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VMSTATE_BOOL(is_inserting, AcpiCpuStatus),
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VMSTATE_BOOL(is_removing, AcpiCpuStatus),
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VMSTATE_UINT32(ost_event, AcpiCpuStatus),
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VMSTATE_UINT32(ost_status, AcpiCpuStatus),
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VMSTATE_END_OF_LIST()
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}
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};
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const VMStateDescription vmstate_cpu_hotplug = {
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.name = "CPU hotplug state",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32(selector, CPUHotplugState),
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VMSTATE_UINT8(command, CPUHotplugState),
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VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count,
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vmstate_cpuhp_sts, AcpiCpuStatus),
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VMSTATE_END_OF_LIST()
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}
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};
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#define CPU_NAME_FMT "C%.03X"
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#define CPUHP_RES_DEVICE "PRES"
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#define CPU_LOCK "CPLK"
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#define CPU_STS_METHOD "CSTA"
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#define CPU_SCAN_METHOD "CSCN"
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#define CPU_NOTIFY_METHOD "CTFY"
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#define CPU_EJECT_METHOD "CEJ0"
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#define CPU_OST_METHOD "COST"
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#define CPU_ENABLED "CPEN"
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#define CPU_SELECTOR "CSEL"
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#define CPU_COMMAND "CCMD"
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#define CPU_DATA "CDAT"
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#define CPU_INSERT_EVENT "CINS"
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#define CPU_REMOVE_EVENT "CRMV"
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#define CPU_EJECT_EVENT "CEJ0"
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void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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hwaddr io_base,
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const char *res_root,
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const char *event_handler_method)
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{
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Aml *ifctx;
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Aml *field;
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Aml *method;
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Aml *cpu_ctrl_dev;
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Aml *cpus_dev;
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Aml *zero = aml_int(0);
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Aml *one = aml_int(1);
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Aml *sb_scope = aml_scope("_SB");
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
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char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root);
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Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL);
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AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
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AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj);
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cpu_ctrl_dev = aml_device("%s", cphp_res_path);
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{
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Aml *crs;
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aml_append(cpu_ctrl_dev,
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aml_name_decl("_HID", aml_eisaid("PNP0A06")));
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aml_append(cpu_ctrl_dev,
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aml_name_decl("_UID", aml_string("CPU Hotplug resources")));
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aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0));
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crs = aml_resource_template();
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aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1,
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ACPI_CPU_HOTPLUG_REG_LEN));
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aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs));
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/* declare CPU hotplug MMIO region with related access fields */
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aml_append(cpu_ctrl_dev,
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aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base),
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ACPI_CPU_HOTPLUG_REG_LEN));
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field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK,
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AML_WRITE_AS_ZEROS);
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aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8));
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/* 1 if enabled, read only */
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aml_append(field, aml_named_field(CPU_ENABLED, 1));
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/* (read) 1 if has a insert event. (write) 1 to clear event */
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aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1));
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/* (read) 1 if has a remove event. (write) 1 to clear event */
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aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1));
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/* initiates device eject, write only */
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aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1));
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aml_append(field, aml_reserved_field(4));
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aml_append(field, aml_named_field(CPU_COMMAND, 8));
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aml_append(cpu_ctrl_dev, field);
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field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
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/* CPU selector, write only */
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aml_append(field, aml_named_field(CPU_SELECTOR, 32));
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/* flags + cmd + 2byte align */
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aml_append(field, aml_reserved_field(4 * 8));
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aml_append(field, aml_named_field(CPU_DATA, 32));
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aml_append(cpu_ctrl_dev, field);
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if (opts.has_legacy_cphp) {
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method = aml_method("_INI", 0, AML_SERIALIZED);
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/* switch off legacy CPU hotplug HW and use new one,
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* on reboot system is in new mode and writing 0
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* in CPU_SELECTOR selects BSP, which is NOP at
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* the time _INI is called */
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aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR)));
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aml_append(cpu_ctrl_dev, method);
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}
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}
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aml_append(sb_scope, cpu_ctrl_dev);
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cpus_dev = aml_device("\\_SB.CPUS");
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{
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int i;
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Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK);
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Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR);
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Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED);
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Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND);
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Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA);
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Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT);
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Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT);
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Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT);
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aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010")));
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aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05")));
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method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
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for (i = 0; i < arch_ids->len; i++) {
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Aml *cpu = aml_name(CPU_NAME_FMT, i);
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Aml *uid = aml_arg(0);
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Aml *event = aml_arg(1);
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ifctx = aml_if(aml_equal(uid, aml_int(i)));
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{
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aml_append(ifctx, aml_notify(cpu, event));
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}
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aml_append(method, ifctx);
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}
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aml_append(cpus_dev, method);
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method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED);
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{
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Aml *idx = aml_arg(0);
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Aml *sta = aml_local(0);
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aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
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aml_append(method, aml_store(idx, cpu_selector));
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aml_append(method, aml_store(zero, sta));
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ifctx = aml_if(aml_equal(is_enabled, one));
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{
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aml_append(ifctx, aml_store(aml_int(0xF), sta));
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}
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aml_append(method, ifctx);
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aml_append(method, aml_release(ctrl_lock));
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aml_append(method, aml_return(sta));
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}
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aml_append(cpus_dev, method);
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method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED);
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{
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Aml *idx = aml_arg(0);
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aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
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aml_append(method, aml_store(idx, cpu_selector));
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aml_append(method, aml_store(one, ej_evt));
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aml_append(method, aml_release(ctrl_lock));
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}
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aml_append(cpus_dev, method);
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method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED);
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{
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Aml *else_ctx;
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Aml *while_ctx;
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Aml *has_event = aml_local(0);
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Aml *dev_chk = aml_int(1);
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Aml *eject_req = aml_int(3);
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|
Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD);
|
|
|
|
aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
|
|
aml_append(method, aml_store(one, has_event));
|
|
while_ctx = aml_while(aml_equal(has_event, one));
|
|
{
|
|
/* clear loop exit condition, ins_evt/rm_evt checks
|
|
* will set it to 1 while next_cpu_cmd returns a CPU
|
|
* with events */
|
|
aml_append(while_ctx, aml_store(zero, has_event));
|
|
aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd));
|
|
ifctx = aml_if(aml_equal(ins_evt, one));
|
|
{
|
|
aml_append(ifctx,
|
|
aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk));
|
|
aml_append(ifctx, aml_store(one, ins_evt));
|
|
aml_append(ifctx, aml_store(one, has_event));
|
|
}
|
|
aml_append(while_ctx, ifctx);
|
|
else_ctx = aml_else();
|
|
ifctx = aml_if(aml_equal(rm_evt, one));
|
|
{
|
|
aml_append(ifctx,
|
|
aml_call2(CPU_NOTIFY_METHOD, cpu_data, eject_req));
|
|
aml_append(ifctx, aml_store(one, rm_evt));
|
|
aml_append(ifctx, aml_store(one, has_event));
|
|
}
|
|
aml_append(else_ctx, ifctx);
|
|
aml_append(while_ctx, else_ctx);
|
|
}
|
|
aml_append(method, while_ctx);
|
|
aml_append(method, aml_release(ctrl_lock));
|
|
}
|
|
aml_append(cpus_dev, method);
|
|
|
|
method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED);
|
|
{
|
|
Aml *uid = aml_arg(0);
|
|
Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD);
|
|
Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD);
|
|
|
|
aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
|
|
aml_append(method, aml_store(uid, cpu_selector));
|
|
aml_append(method, aml_store(ev_cmd, cpu_cmd));
|
|
aml_append(method, aml_store(aml_arg(1), cpu_data));
|
|
aml_append(method, aml_store(st_cmd, cpu_cmd));
|
|
aml_append(method, aml_store(aml_arg(2), cpu_data));
|
|
aml_append(method, aml_release(ctrl_lock));
|
|
}
|
|
aml_append(cpus_dev, method);
|
|
|
|
/* build Processor object for each processor */
|
|
for (i = 0; i < arch_ids->len; i++) {
|
|
Aml *dev;
|
|
Aml *uid = aml_int(i);
|
|
GArray *madt_buf = g_array_new(0, 1, 1);
|
|
int arch_id = arch_ids->cpus[i].arch_id;
|
|
|
|
if (opts.apci_1_compatible && arch_id < 255) {
|
|
dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i);
|
|
} else {
|
|
dev = aml_device(CPU_NAME_FMT, i);
|
|
aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
|
|
aml_append(dev, aml_name_decl("_UID", uid));
|
|
}
|
|
|
|
method = aml_method("_STA", 0, AML_SERIALIZED);
|
|
aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid)));
|
|
aml_append(dev, method);
|
|
|
|
/* build _MAT object */
|
|
assert(adevc && adevc->madt_cpu);
|
|
adevc->madt_cpu(adev, i, arch_ids, madt_buf);
|
|
switch (madt_buf->data[0]) {
|
|
case ACPI_APIC_PROCESSOR: {
|
|
AcpiMadtProcessorApic *apic = (void *)madt_buf->data;
|
|
apic->flags = cpu_to_le32(1);
|
|
break;
|
|
}
|
|
case ACPI_APIC_LOCAL_X2APIC: {
|
|
AcpiMadtProcessorX2Apic *apic = (void *)madt_buf->data;
|
|
apic->flags = cpu_to_le32(1);
|
|
break;
|
|
}
|
|
default:
|
|
assert(0);
|
|
}
|
|
aml_append(dev, aml_name_decl("_MAT",
|
|
aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data)));
|
|
g_array_free(madt_buf, true);
|
|
|
|
method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
|
|
aml_append(method, aml_call1(CPU_EJECT_METHOD, uid));
|
|
aml_append(dev, method);
|
|
|
|
method = aml_method("_OST", 3, AML_SERIALIZED);
|
|
aml_append(method,
|
|
aml_call4(CPU_OST_METHOD, uid, aml_arg(0),
|
|
aml_arg(1), aml_arg(2))
|
|
);
|
|
aml_append(dev, method);
|
|
|
|
/* Linux guests discard SRAT info for non-present CPUs
|
|
* as a result _PXM is required for all CPUs which might
|
|
* be hot-plugged. For simplicity, add it for all CPUs.
|
|
*/
|
|
if (arch_ids->cpus[i].props.has_node_id) {
|
|
aml_append(dev, aml_name_decl("_PXM",
|
|
aml_int(arch_ids->cpus[i].props.node_id)));
|
|
}
|
|
|
|
aml_append(cpus_dev, dev);
|
|
}
|
|
}
|
|
aml_append(sb_scope, cpus_dev);
|
|
aml_append(table, sb_scope);
|
|
|
|
method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
|
|
aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
|
|
aml_append(table, method);
|
|
|
|
g_free(cphp_res_path);
|
|
}
|