Paolo Bonzini de65b39a51 target/i386: tcg: high bits SSE cmp operation must be ignored ... High bits in the immediate operand of SSE comparisons are ignored, they do not result in an undefined opcode exception. This is mentioned explicitly in the Intel documentation. Reported-by: sonicadvance1@gmail.com Closes: https://gitlab.com/qemu-project/qemu/-/issues/184 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2022-03-24 09:11:03 +01:00
..
sysemu	target/i386: Throw a #SS when loading a non-canonical IST	2022-03-15 11:50:15 +01:00
user	target/i386: Implement x86_cpu_record_sigsegv	2021-11-02 07:00:52 -04:00
bpt_helper.c
cc_helper_template.h
cc_helper.c
excp_helper.c
fpu_helper.c
helper-tcg.h	target/i386: Implement x86_cpu_record_sigsegv	2021-11-02 07:00:52 -04:00
int_helper.c	exec/exec-all: Move 'qemu/log.h' include in units requiring it	2022-02-21 10:18:06 +01:00
mem_helper.c	exec/memop: Adding signedness to quad definitions	2022-01-08 15:46:10 +10:00
meson.build
misc_helper.c	exec/exec-all: Move 'qemu/log.h' include in units requiring it	2022-02-21 10:18:06 +01:00
mpx_helper.c
seg_helper.c	target/i386: Throw a #SS when loading a non-canonical IST	2022-03-15 11:50:15 +01:00
seg_helper.h
tcg-cpu.c	target/i386: Implement x86_cpu_record_sigsegv	2021-11-02 07:00:52 -04:00
tcg-cpu.h
tcg-stub.c
translate.c	target/i386: tcg: high bits SSE cmp operation must be ignored	2022-03-24 09:11:03 +01:00