Peter Maydell 8cb2ca3d74 target/i386: Generate #UD for LOCK on a register increment ...

Fix a TCG crash due to attempting an atomic increment
operation without having set up the address first.
This is a similar case to that dealt with in commit
e84fcd7f662a0d8198703, and we fix it in the same way.

Fixes: https://bugs.launchpad.net/qemu/+bug/1807675
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 20190328104750.25046-1-peter.maydell@linaro.org

2019-04-09 13:29:32 +01:00

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alpha

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arm

target/arm: Set SIMDMISC and FPMISC for 32-bit -cpu max

2019-03-26 12:53:26 +00:00

cris

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hppa

trace-events: Shorten file names in comments

2019-03-22 16:18:07 +00:00

i386

target/i386: Generate #UD for LOCK on a register increment

2019-04-09 13:29:32 +01:00

lm32

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m68k

target/m68k: Fix LGPL information in the file headers

2019-01-30 14:20:13 +01:00

microblaze

target/microblaze: Add props enabling exceptions on failed bus accesses

2019-01-22 03:17:34 -08:00

mips

trace-events: Shorten file names in comments

2019-03-22 16:18:07 +00:00

moxie

target/moxie: Fix LGPL information in the file headers

2019-02-06 15:46:11 +01:00

nios2

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openrisc

target/openrisc: Fix LGPL version number

2019-01-30 11:01:36 +01:00

ppc

target/ppc: Fix QEMU crash with stxsdx

2019-03-29 10:22:22 +11:00

riscv

target/riscv: Fix wrong expanding for c.fswsp

2019-03-26 03:17:30 -07:00

s390x

trace-events: Shorten file names in comments

2019-03-22 16:18:07 +00:00

sh4

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sparc

trace-events: Shorten file names in comments

2019-03-22 16:18:07 +00:00

tilegx

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tricore

tricore: fixed RCR_CADDN instruction

2019-03-08 10:00:59 +01:00

unicore32

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xtensa

target/xtensa: don't announce exit simcall

2019-03-23 14:41:48 -07:00