OpenE2K/qemu-e2k
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54a78718be
qemu-e2k/target
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Richard Henderson 54a78718be target/arm: Conditionalize DBGDIDR 
Only define the register if it exists for the cpu.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210120031656.737646-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-01-29 10:47:28 +00:00
..
alpha migration: Replace migration's JSON writer by the general one 2020-12-19 10:39:16 +01:00
arm target/arm: Conditionalize DBGDIDR 2021-01-29 10:47:28 +00:00
avr tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
cris
hppa tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
i386 qapi: Use QAPI_LIST_APPEND in trivial cases 2021-01-28 08:08:45 +01:00
lm32
m68k gdbstub: drop CPUEnv from gdb_exit() 2021-01-18 10:05:06 +00:00
microblaze target/microblaze: Add security attributes on memory transactions 2021-01-27 08:32:55 +01:00
mips target/mips: Remove vendor specific CPU definitions 2021-01-14 17:13:54 +01:00
moxie
nios2 gdbstub: drop CPUEnv from gdb_exit() 2021-01-18 10:05:06 +00:00
openrisc migration: Replace migration's JSON writer by the general one 2020-12-19 10:39:16 +01:00
ppc migration: Replace migration's JSON writer by the general one 2020-12-19 10:39:16 +01:00
riscv Testing, gdbstub and semihosting patches: 2021-01-18 12:10:20 +00:00
rx tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
s390x s390x: Use strpadcpy for copying vm name 2021-01-21 11:19:45 +01:00
sh4 tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
sparc tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
tilegx
tricore tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
unicore32 target/unicore32/translate: Add missing fallthrough annotations 2020-12-18 09:14:22 +01:00
xtensa
meson.build