Philippe Mathieu-Daudé 5502b66fc7 mips: move hw/mips/cputimer.c to target/mips/ ... This timer is a required part of the MIPS32/MIPS64 System Control coprocessor (CP0). Moving it with the other architecture related files will allow an opaque use of CPUMIPSState* in the next commit (introduce "internal.h"). also remove it from 'user' targets, remove an unnecessary include. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Igor Mammedov <imammedo@redhat.com> Tested-by: James Hogan <james.hogan@imgtec.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>		2017-09-21 13:24:34 +01:00
..
Makefile.objs	mips: move hw/mips/cputimer.c to target/mips/	2017-09-21 13:24:34 +01:00
TODO	…
cp0_timer.c	mips: move hw/mips/cputimer.c to target/mips/	2017-09-21 13:24:34 +01:00
cpu-qom.h	…
cpu.c	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
cpu.h	target/mips: Add segmentation control registers	2017-07-20 22:42:26 +01:00
dsp_helper.c	…
gdbstub.c	…
helper.c	mips: Add KVM T&E segment support for TCG	2017-08-02 22:18:06 +01:00
helper.h	target/mips: Add segmentation control registers	2017-07-20 22:42:26 +01:00
kvm.c	target/mips: Convert VM clock update prints to warn_report	2017-09-19 14:09:34 +02:00
kvm_mips.h	…
lmi_helper.c	…
machine.c	target/mips: Add segmentation control registers	2017-07-20 22:42:26 +01:00
mips-defs.h	…
mips-semi.c	…
msa_helper.c	…
op_helper.c	target-mips: apply CP0.PageMask before writing into TLB entry	2017-08-02 22:18:11 +01:00
trace-events	docs: fix broken paths to docs/devel/tracing.txt	2017-07-31 13:12:53 +03:00
translate.c	target/mips: Fix RDHWR CC with icount	2017-08-02 22:18:13 +01:00
translate_init.c	target/mips: Enable CP0_EBase.WG on MIPS64 CPUs	2017-07-21 03:23:44 +01:00