qemu-e2k/include/hw/i386
Xiao Guangrong 87252e1b61 nvdimm acpi: build ACPI NFIT table
NFIT is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT)

Currently, we only support PMEM mode. Each device has 3 structures:
- SPA structure, defines the PMEM region info

- MEM DEV structure, it has the @handle which is used to associate specified
  ACPI NVDIMM  device we will introduce in later patch.
  Also we can happily ignored the memory device's interleave, the real
  nvdimm hardware access is hidden behind host

- DCR structure, it defines vendor ID used to associate specified vendor
  nvdimm driver. Since we only implement PMEM mode this time, Command
  window and Data window are not needed

The NVDIMM functionality is controlled by the parameter, 'nvdimm', which
is introduced for the machine, there is a example to enable it:
-machine pc,nvdimm -m 8G,maxmem=100G,slots=100  -object \
memory-backend-file,id=mem1,share,mem-path=/tmp/nvdimm1,size=10G -device \
nvdimm,memdev=mem1,id=nv1

It is disabled on default

Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-12-22 18:39:20 +02:00
..
apic_internal.h cpu/apic: drop icc bus/bridge 2015-10-02 16:22:02 -03:00
apic-msidef.h hw: move headers to include/ 2013-04-08 18:13:10 +02:00
apic.h target-i386: clear bsp bit when designating bsp 2015-04-02 15:57:27 +02:00
ich9.h ich9: implement strap SPKR pin logic 2015-07-08 10:09:55 +03:00
intel_iommu.h intel_iommu: Add support for translation for devices behind bridges 2015-10-18 10:05:43 +03:00
ioapic_internal.h hmp: added io apic dump state 2015-09-25 12:04:42 +02:00
ioapic.h pc: move IO_APIC_DEFAULT_ADDRESS to include/hw/i386/ioapic.h 2013-07-29 19:33:32 -05:00
pc.h nvdimm acpi: build ACPI NFIT table 2015-12-22 18:39:20 +02:00
topology.h cpu: Introduce X86CPUTopoInfo structure for argument simplification 2015-10-02 16:22:01 -03:00