fcf5ef2ab5
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [crisµblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
472 lines
11 KiB
C
472 lines
11 KiB
C
/*
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* Helpers for lazy condition code handling
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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static uint32_t compute_all_flags(CPUSPARCState *env)
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{
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return env->psr & PSR_ICC;
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}
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static uint32_t compute_C_flags(CPUSPARCState *env)
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{
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return env->psr & PSR_CARRY;
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}
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static inline uint32_t get_NZ_icc(int32_t dst)
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{
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uint32_t ret = 0;
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if (dst == 0) {
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ret = PSR_ZERO;
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} else if (dst < 0) {
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ret = PSR_NEG;
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}
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return ret;
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}
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#ifdef TARGET_SPARC64
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static uint32_t compute_all_flags_xcc(CPUSPARCState *env)
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{
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return env->xcc & PSR_ICC;
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}
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static uint32_t compute_C_flags_xcc(CPUSPARCState *env)
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{
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return env->xcc & PSR_CARRY;
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}
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static inline uint32_t get_NZ_xcc(target_long dst)
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{
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uint32_t ret = 0;
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if (!dst) {
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ret = PSR_ZERO;
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} else if (dst < 0) {
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ret = PSR_NEG;
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}
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return ret;
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}
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#endif
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static inline uint32_t get_V_div_icc(target_ulong src2)
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{
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uint32_t ret = 0;
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if (src2 != 0) {
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ret = PSR_OVF;
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}
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return ret;
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}
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static uint32_t compute_all_div(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_icc(CC_DST);
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ret |= get_V_div_icc(CC_SRC2);
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return ret;
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}
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static uint32_t compute_C_div(CPUSPARCState *env)
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{
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return 0;
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}
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static inline uint32_t get_C_add_icc(uint32_t dst, uint32_t src1)
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{
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uint32_t ret = 0;
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if (dst < src1) {
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ret = PSR_CARRY;
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}
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return ret;
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}
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static inline uint32_t get_C_addx_icc(uint32_t dst, uint32_t src1,
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uint32_t src2)
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{
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uint32_t ret = 0;
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if (((src1 & src2) | (~dst & (src1 | src2))) & (1U << 31)) {
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ret = PSR_CARRY;
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}
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return ret;
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}
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static inline uint32_t get_V_add_icc(uint32_t dst, uint32_t src1,
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uint32_t src2)
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{
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uint32_t ret = 0;
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if (((src1 ^ src2 ^ -1) & (src1 ^ dst)) & (1U << 31)) {
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ret = PSR_OVF;
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}
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return ret;
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}
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#ifdef TARGET_SPARC64
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static inline uint32_t get_C_add_xcc(target_ulong dst, target_ulong src1)
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{
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uint32_t ret = 0;
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if (dst < src1) {
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ret = PSR_CARRY;
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}
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return ret;
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}
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static inline uint32_t get_C_addx_xcc(target_ulong dst, target_ulong src1,
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target_ulong src2)
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{
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uint32_t ret = 0;
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if (((src1 & src2) | (~dst & (src1 | src2))) & (1ULL << 63)) {
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ret = PSR_CARRY;
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}
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return ret;
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}
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static inline uint32_t get_V_add_xcc(target_ulong dst, target_ulong src1,
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target_ulong src2)
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{
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uint32_t ret = 0;
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if (((src1 ^ src2 ^ -1) & (src1 ^ dst)) & (1ULL << 63)) {
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ret = PSR_OVF;
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}
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return ret;
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}
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static uint32_t compute_all_add_xcc(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_xcc(CC_DST);
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ret |= get_C_add_xcc(CC_DST, CC_SRC);
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ret |= get_V_add_xcc(CC_DST, CC_SRC, CC_SRC2);
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return ret;
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}
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static uint32_t compute_C_add_xcc(CPUSPARCState *env)
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{
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return get_C_add_xcc(CC_DST, CC_SRC);
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}
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#endif
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static uint32_t compute_all_add(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_icc(CC_DST);
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ret |= get_C_add_icc(CC_DST, CC_SRC);
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ret |= get_V_add_icc(CC_DST, CC_SRC, CC_SRC2);
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return ret;
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}
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static uint32_t compute_C_add(CPUSPARCState *env)
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{
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return get_C_add_icc(CC_DST, CC_SRC);
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}
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#ifdef TARGET_SPARC64
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static uint32_t compute_all_addx_xcc(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_xcc(CC_DST);
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ret |= get_C_addx_xcc(CC_DST, CC_SRC, CC_SRC2);
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ret |= get_V_add_xcc(CC_DST, CC_SRC, CC_SRC2);
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return ret;
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}
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static uint32_t compute_C_addx_xcc(CPUSPARCState *env)
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{
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return get_C_addx_xcc(CC_DST, CC_SRC, CC_SRC2);
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}
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#endif
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static uint32_t compute_all_addx(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_icc(CC_DST);
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ret |= get_C_addx_icc(CC_DST, CC_SRC, CC_SRC2);
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ret |= get_V_add_icc(CC_DST, CC_SRC, CC_SRC2);
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return ret;
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}
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static uint32_t compute_C_addx(CPUSPARCState *env)
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{
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return get_C_addx_icc(CC_DST, CC_SRC, CC_SRC2);
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}
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static inline uint32_t get_V_tag_icc(target_ulong src1, target_ulong src2)
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{
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uint32_t ret = 0;
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if ((src1 | src2) & 0x3) {
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ret = PSR_OVF;
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}
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return ret;
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}
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static uint32_t compute_all_tadd(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_icc(CC_DST);
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ret |= get_C_add_icc(CC_DST, CC_SRC);
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ret |= get_V_add_icc(CC_DST, CC_SRC, CC_SRC2);
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ret |= get_V_tag_icc(CC_SRC, CC_SRC2);
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return ret;
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}
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static uint32_t compute_all_taddtv(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_icc(CC_DST);
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ret |= get_C_add_icc(CC_DST, CC_SRC);
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return ret;
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}
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static inline uint32_t get_C_sub_icc(uint32_t src1, uint32_t src2)
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{
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uint32_t ret = 0;
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if (src1 < src2) {
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ret = PSR_CARRY;
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}
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return ret;
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}
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static inline uint32_t get_C_subx_icc(uint32_t dst, uint32_t src1,
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uint32_t src2)
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{
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uint32_t ret = 0;
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if (((~src1 & src2) | (dst & (~src1 | src2))) & (1U << 31)) {
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ret = PSR_CARRY;
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}
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return ret;
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}
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static inline uint32_t get_V_sub_icc(uint32_t dst, uint32_t src1,
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uint32_t src2)
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{
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uint32_t ret = 0;
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if (((src1 ^ src2) & (src1 ^ dst)) & (1U << 31)) {
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ret = PSR_OVF;
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}
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return ret;
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}
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#ifdef TARGET_SPARC64
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static inline uint32_t get_C_sub_xcc(target_ulong src1, target_ulong src2)
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{
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uint32_t ret = 0;
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if (src1 < src2) {
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ret = PSR_CARRY;
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}
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return ret;
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}
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static inline uint32_t get_C_subx_xcc(target_ulong dst, target_ulong src1,
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target_ulong src2)
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{
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uint32_t ret = 0;
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if (((~src1 & src2) | (dst & (~src1 | src2))) & (1ULL << 63)) {
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ret = PSR_CARRY;
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}
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return ret;
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}
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static inline uint32_t get_V_sub_xcc(target_ulong dst, target_ulong src1,
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target_ulong src2)
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{
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uint32_t ret = 0;
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if (((src1 ^ src2) & (src1 ^ dst)) & (1ULL << 63)) {
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ret = PSR_OVF;
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}
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return ret;
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}
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static uint32_t compute_all_sub_xcc(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_xcc(CC_DST);
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ret |= get_C_sub_xcc(CC_SRC, CC_SRC2);
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ret |= get_V_sub_xcc(CC_DST, CC_SRC, CC_SRC2);
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return ret;
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}
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static uint32_t compute_C_sub_xcc(CPUSPARCState *env)
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{
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return get_C_sub_xcc(CC_SRC, CC_SRC2);
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}
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#endif
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static uint32_t compute_all_sub(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_icc(CC_DST);
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ret |= get_C_sub_icc(CC_SRC, CC_SRC2);
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ret |= get_V_sub_icc(CC_DST, CC_SRC, CC_SRC2);
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return ret;
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}
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static uint32_t compute_C_sub(CPUSPARCState *env)
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{
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return get_C_sub_icc(CC_SRC, CC_SRC2);
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}
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#ifdef TARGET_SPARC64
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static uint32_t compute_all_subx_xcc(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_xcc(CC_DST);
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ret |= get_C_subx_xcc(CC_DST, CC_SRC, CC_SRC2);
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ret |= get_V_sub_xcc(CC_DST, CC_SRC, CC_SRC2);
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return ret;
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}
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static uint32_t compute_C_subx_xcc(CPUSPARCState *env)
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{
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return get_C_subx_xcc(CC_DST, CC_SRC, CC_SRC2);
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}
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#endif
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static uint32_t compute_all_subx(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_icc(CC_DST);
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ret |= get_C_subx_icc(CC_DST, CC_SRC, CC_SRC2);
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ret |= get_V_sub_icc(CC_DST, CC_SRC, CC_SRC2);
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return ret;
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}
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static uint32_t compute_C_subx(CPUSPARCState *env)
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{
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return get_C_subx_icc(CC_DST, CC_SRC, CC_SRC2);
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}
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static uint32_t compute_all_tsub(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_icc(CC_DST);
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ret |= get_C_sub_icc(CC_SRC, CC_SRC2);
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ret |= get_V_sub_icc(CC_DST, CC_SRC, CC_SRC2);
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ret |= get_V_tag_icc(CC_SRC, CC_SRC2);
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return ret;
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}
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static uint32_t compute_all_tsubtv(CPUSPARCState *env)
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{
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uint32_t ret;
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ret = get_NZ_icc(CC_DST);
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ret |= get_C_sub_icc(CC_SRC, CC_SRC2);
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return ret;
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}
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static uint32_t compute_all_logic(CPUSPARCState *env)
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{
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return get_NZ_icc(CC_DST);
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}
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static uint32_t compute_C_logic(CPUSPARCState *env)
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{
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return 0;
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}
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#ifdef TARGET_SPARC64
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static uint32_t compute_all_logic_xcc(CPUSPARCState *env)
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{
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return get_NZ_xcc(CC_DST);
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}
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#endif
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typedef struct CCTable {
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uint32_t (*compute_all)(CPUSPARCState *env); /* return all the flags */
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uint32_t (*compute_c)(CPUSPARCState *env); /* return the C flag */
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} CCTable;
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static const CCTable icc_table[CC_OP_NB] = {
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/* CC_OP_DYNAMIC should never happen */
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[CC_OP_FLAGS] = { compute_all_flags, compute_C_flags },
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[CC_OP_DIV] = { compute_all_div, compute_C_div },
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[CC_OP_ADD] = { compute_all_add, compute_C_add },
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[CC_OP_ADDX] = { compute_all_addx, compute_C_addx },
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[CC_OP_TADD] = { compute_all_tadd, compute_C_add },
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[CC_OP_TADDTV] = { compute_all_taddtv, compute_C_add },
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[CC_OP_SUB] = { compute_all_sub, compute_C_sub },
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[CC_OP_SUBX] = { compute_all_subx, compute_C_subx },
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[CC_OP_TSUB] = { compute_all_tsub, compute_C_sub },
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[CC_OP_TSUBTV] = { compute_all_tsubtv, compute_C_sub },
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[CC_OP_LOGIC] = { compute_all_logic, compute_C_logic },
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};
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#ifdef TARGET_SPARC64
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static const CCTable xcc_table[CC_OP_NB] = {
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/* CC_OP_DYNAMIC should never happen */
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[CC_OP_FLAGS] = { compute_all_flags_xcc, compute_C_flags_xcc },
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[CC_OP_DIV] = { compute_all_logic_xcc, compute_C_logic },
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[CC_OP_ADD] = { compute_all_add_xcc, compute_C_add_xcc },
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[CC_OP_ADDX] = { compute_all_addx_xcc, compute_C_addx_xcc },
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[CC_OP_TADD] = { compute_all_add_xcc, compute_C_add_xcc },
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[CC_OP_TADDTV] = { compute_all_add_xcc, compute_C_add_xcc },
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[CC_OP_SUB] = { compute_all_sub_xcc, compute_C_sub_xcc },
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[CC_OP_SUBX] = { compute_all_subx_xcc, compute_C_subx_xcc },
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[CC_OP_TSUB] = { compute_all_sub_xcc, compute_C_sub_xcc },
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[CC_OP_TSUBTV] = { compute_all_sub_xcc, compute_C_sub_xcc },
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[CC_OP_LOGIC] = { compute_all_logic_xcc, compute_C_logic },
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};
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#endif
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void helper_compute_psr(CPUSPARCState *env)
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{
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uint32_t new_psr;
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new_psr = icc_table[CC_OP].compute_all(env);
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env->psr = new_psr;
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#ifdef TARGET_SPARC64
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new_psr = xcc_table[CC_OP].compute_all(env);
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env->xcc = new_psr;
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#endif
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CC_OP = CC_OP_FLAGS;
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}
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uint32_t helper_compute_C_icc(CPUSPARCState *env)
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{
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return icc_table[CC_OP].compute_c(env) >> PSR_CARRY_SHIFT;
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}
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