d1396cc749
To be 'usable', QDev objects (which are QOM objects) must be 1/ initialized (at this point their properties can be modified), then 2/ realized (properties are consumed). Some devices (objects) might depend on other devices. When creating the 'QOM composition tree', parent objects can't be 'realized' until all their children are. We might also have circular dependencies. A common circular dependency occurs with IRQs. Device (A) has an output IRQ wired to device (B), and device (B) has one to device (A). When (A) is realized and connects its IRQ to an unrealized (B), the IRQ handler on (B) is not yet created. QEMU pass IRQ between objects as pointer. When (A) poll (B)'s IRQ, it is NULL. Later (B) is realized and its IRQ pointers are populated, but (A) keeps a reference to a NULL pointer. A common pattern to bypass this circular limitation is to use 'proxy' objects. Proxy (P) is created (and realized) before (A) and (B). Then (A) and (B) can be created in different order, it doesn't matter: (P) pointers are already populated. Commitcef2e7148e
("hw/isa/i82378: Remove intermediate IRQ forwarder") neglected the QOM/QDev circular dependency issue, and removed the 'proxy' between the southbridge, its PCI functions and the interrupt controller, resulting in PCI functions wiring output IRQs to 'NULL', leading to guest failures (IRQ never delivered) [1] [2]. Since we are entering feature freeze, it is safer to revert the offending patch until we figure a way to strengthen our APIs. [1] https://lore.kernel.org/qemu-devel/928a8552-ab62-9e6c-a492-d6453e338b9d@redhat.com/ [2] https://lore.kernel.org/qemu-devel/cover.1677628524.git.balaton@eik.bme.hu/ This reverts commitcef2e7148e
. Reported-by: Thomas Huth <thuth@redhat.com> Inspired-by: Bernhard Beschow <shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
153 lines
4.1 KiB
C
153 lines
4.1 KiB
C
/*
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* QEMU Intel i82378 emulation (PCI to ISA bridge)
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*
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* Copyright (c) 2010-2011 Hervé Poussineau
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "hw/pci/pci_device.h"
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#include "hw/irq.h"
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#include "hw/intc/i8259.h"
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#include "hw/timer/i8254.h"
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#include "migration/vmstate.h"
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#include "hw/audio/pcspk.h"
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#include "qom/object.h"
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#define TYPE_I82378 "i82378"
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OBJECT_DECLARE_SIMPLE_TYPE(I82378State, I82378)
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struct I82378State {
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PCIDevice parent_obj;
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qemu_irq cpu_intr;
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qemu_irq *isa_irqs_in;
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MemoryRegion io;
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};
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static const VMStateDescription vmstate_i82378 = {
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.name = "pci-i82378",
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.version_id = 0,
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.minimum_version_id = 0,
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.fields = (VMStateField[]) {
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VMSTATE_PCI_DEVICE(parent_obj, I82378State),
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VMSTATE_END_OF_LIST()
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},
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};
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static void i82378_request_out0_irq(void *opaque, int irq, int level)
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{
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I82378State *s = opaque;
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qemu_set_irq(s->cpu_intr, level);
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}
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static void i82378_request_pic_irq(void *opaque, int irq, int level)
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{
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DeviceState *dev = opaque;
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I82378State *s = I82378(dev);
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qemu_set_irq(s->isa_irqs_in[irq], level);
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}
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static void i82378_realize(PCIDevice *pci, Error **errp)
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{
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DeviceState *dev = DEVICE(pci);
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I82378State *s = I82378(dev);
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uint8_t *pci_conf;
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ISABus *isabus;
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ISADevice *pit;
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pci_conf = pci->config;
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pci_set_word(pci_conf + PCI_COMMAND,
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PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
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pci_set_word(pci_conf + PCI_STATUS,
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PCI_STATUS_DEVSEL_MEDIUM);
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pci_config_set_interrupt_pin(pci_conf, 1); /* interrupt pin 0 */
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isabus = isa_bus_new(dev, get_system_memory(),
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pci_address_space_io(pci), errp);
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if (!isabus) {
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return;
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}
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/* This device has:
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2 82C59 (irq)
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1 82C54 (pit)
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2 82C37 (dma)
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NMI
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Utility Bus Support Registers
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All devices accept byte access only, except timer
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*/
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/* 2 82C59 (irq) */
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s->isa_irqs_in = i8259_init(isabus,
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qemu_allocate_irq(i82378_request_out0_irq,
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s, 0));
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isa_bus_register_input_irqs(isabus, s->isa_irqs_in);
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/* 1 82C54 (pit) */
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pit = i8254_pit_init(isabus, 0x40, 0, NULL);
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/* speaker */
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pcspk_init(isa_new(TYPE_PC_SPEAKER), isabus, pit);
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/* 2 82C37 (dma) */
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isa_create_simple(isabus, "i82374");
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}
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static void i82378_init(Object *obj)
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{
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DeviceState *dev = DEVICE(obj);
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I82378State *s = I82378(obj);
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qdev_init_gpio_out(dev, &s->cpu_intr, 1);
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qdev_init_gpio_in(dev, i82378_request_pic_irq, 16);
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}
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static void i82378_class_init(ObjectClass *klass, void *data)
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{
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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k->realize = i82378_realize;
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k->vendor_id = PCI_VENDOR_ID_INTEL;
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k->device_id = PCI_DEVICE_ID_INTEL_82378;
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k->revision = 0x03;
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k->class_id = PCI_CLASS_BRIDGE_ISA;
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dc->vmsd = &vmstate_i82378;
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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}
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static const TypeInfo i82378_type_info = {
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.name = TYPE_I82378,
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(I82378State),
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.instance_init = i82378_init,
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.class_init = i82378_class_init,
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.interfaces = (InterfaceInfo[]) {
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{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
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{ },
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},
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};
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static void i82378_register_types(void)
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{
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type_register_static(&i82378_type_info);
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}
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type_init(i82378_register_types)
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