qemu-e2k/target/hppa
Sven Schnelle 68aa851aa2 target/hppa: fix PSW Q bit behaviour to match hardware
PA-RISC specification says: "Setting the PSW Q-bit, PSW{28}, to 1
with this instruction, if it was not already 1, is an undefined
operation." However, at least HP-UX 10.20 sets the Q bit from 0 to 1
with the SSM instruction. Tested this both on HP9000/712 and
HP9000/785/C3750, both machines set the Q bit from 0 to 1 without
exception. This makes HP-UX 10.20 progress a little bit further.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Message-Id: <20190129191402.29539-1-svens@stackframe.org>
[rth: Add a comment to the code as well.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-06 10:49:21 +00:00
..
cpu-qom.h
cpu.c
cpu.h
gdbstub.c target/hppa: fix setting registers via gdb 2019-02-06 10:49:21 +00:00
helper.c
helper.h
int_helper.c
machine.c
Makefile.objs
mem_helper.c
op_helper.c target/hppa: fix PSW Q bit behaviour to match hardware 2019-02-06 10:49:21 +00:00
translate.c target/hppa: use tb_cflags() to access tb->cflags 2019-02-06 10:49:21 +00:00