Sunil V L 4c7f4f4f05 hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location ... RISC-V also needs to use the same code to create fw_cfg in DSDT. So, avoid code duplication by moving the code in arm and riscv to a device specific file. Suggested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20231218150247.466427-2-sunilvl@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2024-01-10 18:47:46 +10:00
..
boot.c	target/riscv: rename ext_icsr to ext_zicsr	2023-11-07 11:02:17 +10:00
Kconfig
meson.build
microchip_pfsoc.c
numa.c
opentitan.c	hw/riscv: opentitan: Fixup local variables shadowing	2023-09-29 10:07:20 +02:00
riscv_hart.c
shakti_c.c	hw/riscv/shakti_c: Check CPU type in machine_run_board_init()	2024-01-05 16:20:15 +01:00
sifive_e.c	riscv: Fix SiFive E CLINT clock frequency	2023-11-22 13:57:19 +10:00
sifive_u.c
spike.c
virt-acpi-build.c	hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location	2024-01-10 18:47:46 +10:00
virt.c	hw/riscv/virt.c: do create_fdt() earlier, add finalize_fdt()	2023-11-22 13:55:07 +10:00