qemu-e2k/target
Connor Kuehl 5811b936bf sev: use explicit indices for mapping firmware error codes to strings
This can help lower any margin for error when making future additions to
the list, especially if they're made out of order.

While doing so, make capitalization of ASID consistent with its usage in
the SEV firmware spec (Asid -> ASID).

Signed-off-by: Connor Kuehl <ckuehl@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210430134830.254741-2-ckuehl@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2021-06-01 09:32:48 -04:00
..
alpha hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
arm hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
avr hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
cris hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
hexagon hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
hppa hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
i386 sev: use explicit indices for mapping firmware error codes to strings 2021-06-01 09:32:48 -04:00
m68k Adjust types for some memory access functions. 2021-05-28 16:25:21 +01:00
microblaze hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
mips hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
nios2 hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
openrisc hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
ppc hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
riscv hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
rx hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
s390x hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
sh4 hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
sparc hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
tricore hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
xtensa hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00