qemu-e2k/target/arm
Richard Henderson cc23377516 Add nuvoton sd module for NPCM7XX
Add gdb-xml for MVE
 More uses of tcg_constant_* in target/arm
 Fix parameter naming for default-bus-bypass-iommu
 Ignore cache operations to mmio in HVF
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Merge remote-tracking branch 'remotes/rth/tags/pull-arm-20211102-2' into staging

Add nuvoton sd module for NPCM7XX
Add gdb-xml for MVE
More uses of tcg_constant_* in target/arm
Fix parameter naming for default-bus-bypass-iommu
Ignore cache operations to mmio in HVF

# gpg: Signature made Tue 02 Nov 2021 02:23:53 PM EDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* remotes/rth/tags/pull-arm-20211102-2:
  hvf: arm: Ignore cache operations on MMIO
  hw/arm/virt: Rename default_bus_bypass_iommu
  target/arm: Use tcg_constant_i32() in gen_rev16()
  target/arm: Use tcg_constant_i64() in do_sat_addsub_64()
  target/arm: Use the constant variant of store_cpu_field() when possible
  target/arm: Introduce store_cpu_field_constant() helper
  target/arm: Use tcg_constant_i32() in op_smlad()
  target/arm: Advertise MVE to gdb when present
  tests/qtest/libqos: add SDHCI commands
  hw/arm: Attach MMC to quanta-gbs-bmc
  hw/arm: Add Nuvoton SD module to board
  hw/sd: add nuvoton MMC

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-03 09:31:25 -04:00
..
hvf hvf: arm: Ignore cache operations on MMIO 2021-11-02 14:18:33 -04:00
a32-uncond.decode
a32.decode
arch_dump.c
arm_ldst.h accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
arm-powerctl.c
arm-powerctl.h
cpu64.c target-arm: Add support for Fujitsu A64FX 2021-09-01 11:08:18 +01:00
cpu_tcg.c target/arm: Implement arm_cpu_record_sigbus 2021-11-02 07:00:52 -04:00
cpu-param.h
cpu-qom.h
cpu.c target/arm: Implement arm_cpu_record_sigbus 2021-11-02 07:00:52 -04:00
cpu.h include/exec: Move cpu_signal_handler declaration 2021-09-21 19:36:44 -07:00
crypto_helper.c
debug_helper.c
gdbstub64.c target/arm: Move gdbstub related code out of helper.c 2021-09-30 13:42:10 +01:00
gdbstub.c target/arm: Advertise MVE to gdb when present 2021-11-02 14:14:55 -04:00
helper-a64.c target/arm: Use cpu_*_mmu instead of helper_*_mmu 2021-10-13 08:46:11 -07:00
helper-a64.h
helper-mve.h target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
helper-sve.h
helper.c target/arm: Move gdbstub related code out of helper.c 2021-09-30 13:42:10 +01:00
helper.h target/arm: Implement HSTR.TJDBX 2021-08-26 17:02:01 +01:00
hvf_arm.h hvf: arm: Implement -cpu host 2021-09-21 16:28:26 +01:00
idau.h
internals.h target/arm: Implement arm_cpu_record_sigbus 2021-11-02 07:00:52 -04:00
iwmmxt_helper.c
Kconfig
kvm64.c target/arm/kvm64: Ensure sve vls map is completely clear 2021-08-26 17:01:59 +01:00
kvm_arm.h hvf: arm: Implement -cpu host 2021-09-21 16:28:26 +01:00
kvm-consts.h
kvm-stub.c
kvm.c memory: Name all the memory listeners 2021-09-30 15:30:24 +02:00
m_helper.c target/arm: Use cpu_*_mmu instead of helper_*_mmu 2021-10-13 08:46:11 -07:00
m-nocp.decode
machine.c target/arm: Enforce that FPDSCR.LTPSIZE is 4 on inbound migration 2021-09-21 16:28:27 +01:00
meson.build arm: Add Hypervisor.framework build target 2021-09-21 16:28:26 +01:00
monitor.c
mte_helper.c target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup 2021-11-02 07:00:52 -04:00
mve_helper.c target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
mve.decode target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
neon_helper.c
neon-dp.decode
neon-ls.decode
neon-shared.decode
op_addsub.h
op_helper.c target/arm: Implement HSTR.TJDBX 2021-08-26 17:02:01 +01:00
pauth_helper.c
psci.c arm: tcg: Adhere to SMCCC 1.3 section 5.2 2021-09-30 13:42:09 +01:00
sve_helper.c target/arm: Fixup comment re handle_cpu_signal 2021-11-02 07:00:52 -04:00
sve.decode
syndrome.h target/arm: Take an exception if PSTATE.IL is set 2021-09-13 21:01:08 +01:00
t16.decode
t32.decode target/arm: Implement MVE VCTP 2021-08-25 10:48:50 +01:00
tlb_helper.c target/arm: Implement arm_cpu_record_sigbus 2021-11-02 07:00:52 -04:00
trace-events
trace.h
translate-a32.h target/arm: Introduce store_cpu_field_constant() helper 2021-11-02 14:14:55 -04:00
translate-a64.c target/arm: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
translate-a64.h
translate-m-nocp.c target/arm: Add TB flag for "MVE insns not predicated" 2021-09-21 16:28:27 +01:00
translate-mve.c target/arm: Optimize MVE 1op-immediate insns 2021-09-21 16:28:27 +01:00
translate-neon.c target/arm: Implement MVE VADD (floating-point) 2021-09-01 11:08:16 +01:00
translate-sve.c target/arm: Use tcg_constant_i64() in do_sat_addsub_64() 2021-11-02 14:14:55 -04:00
translate-vfp.c target/arm: Add TB flag for "MVE insns not predicated" 2021-09-21 16:28:27 +01:00
translate.c target/arm: Use tcg_constant_i32() in gen_rev16() 2021-11-02 14:14:55 -04:00
translate.h target/arm: Add TB flag for "MVE insns not predicated" 2021-09-21 16:28:27 +01:00
vec_helper.c target/arm: Implement MVE VMULL (polynomial) 2021-08-25 10:48:49 +01:00
vec_internal.h target/arm: Implement MVE VMULL (polynomial) 2021-08-25 10:48:49 +01:00
vfp_helper.c
vfp-uncond.decode
vfp.decode