99abcbc760
It is quite common for a clock tree to involve possibly programmable clock multipliers or dividers, where the frequency of a clock is for instance divided by 8 to produce a slower clock to feed to a particular device. Currently we provide no convenient mechanism for modelling this. You can implement it by having an input Clock and an output Clock, and manually setting the period of the output clock in the period-changed callback of the input clock, but that's quite clunky. This patch adds support in the Clock objects themselves for setting a multiplier or divider. The effect of setting this on a clock is that when the clock's period is changed, all the children of the clock are set to period * multiplier / divider, rather than being set to the same period as the parent clock. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alexandre Iooss <erdnaxe@crans.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Reviewed-by: Damien Hedde <damien.hedde@greensocs.com> Message-id: 20210812093356.1946-10-peter.maydell@linaro.org |
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| COLO-FT.txt | ||
| colo-proxy.txt | ||
| conf.py | ||
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| defs.rst.inc | ||
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| igd-assign.txt | ||
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| pci_expander_bridge.txt | ||
| pcie_pci_bridge.txt | ||
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| pvrdma.txt | ||
| qcow2-cache.txt | ||
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| qemu_logo.pdf | ||
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| rdma.txt | ||
| replay.txt | ||
| spice-port-fqdn.txt | ||
| throttle.txt | ||
| u2f.txt | ||
| virtio-balloon-stats.txt | ||
| xbzrle.txt | ||
| xen-save-devices-state.txt | ||