qemu-e2k/target-tricore
Bharata B Rao 5a790cc4b9 cpu: Add Error argument to cpu_exec_init()
Add an Error argument to cpu_exec_init() to let users collect the
error. This is in preparation to change the CPU enumeration logic
in cpu_exec_init(). With the new enumeration logic, cpu_exec_init()
can fail if cpu_index values corresponding to max_cpus have already
been handed out.

Since all current callers of cpu_exec_init() are from instance_init,
use error_abort Error argument to abort in case of an error.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09 15:20:40 +02:00
..
cpu-qom.h target-tricore: Remove the dummy interrupt boilerplate 2014-09-25 18:54:22 +01:00
cpu.c cpu: Add Error argument to cpu_exec_init() 2015-07-09 15:20:40 +02:00
cpu.h target-tricore: introduce ISA v1.6.1 feature 2015-05-22 17:02:33 +02:00
csfr.def target-tricore: Fix new typos 2015-01-15 10:44:13 +03:00
helper.c target-tricore: Remove the dummy interrupt boilerplate 2014-09-25 18:54:22 +01:00
helper.h target-tricore: add RR_DIV and RR_DIV_U instructions of the v1.6 ISA 2015-05-22 17:02:34 +02:00
Makefile.objs
op_helper.c target-tricore: fix depositing bits from PCXI into ICR 2015-06-29 14:02:58 +02:00
translate.c disas: Remove uses of CPU env 2015-06-22 17:40:01 +02:00
tricore-defs.h
tricore-opcodes.h target-tricore: add RR_DIV and RR_DIV_U instructions of the v1.6 ISA 2015-05-22 17:02:34 +02:00